Loading drivers/video/msm/mdss/mdss_dsi.h +0 −3 Original line number Diff line number Diff line Loading @@ -251,9 +251,6 @@ struct dsi_shared_data { struct clk *byte1_parent; struct clk *pixel1_parent; /* reg bus clock handle */ struct reg_bus_client *reg_bus_clt; /* DSI core regulators */ struct dss_module_power power_data[DSI_MAX_PM]; Loading drivers/video/msm/mdss/mdss_dsi_clk.c +21 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,8 @@ struct mdss_dsi_clk_mngr { struct dsi_core_clks core_clks; struct dsi_link_clks link_clks; struct reg_bus_client *reg_bus_clt; pre_clockoff_cb pre_clkoff_cb; post_clockoff_cb post_clkoff_cb; post_clockon_cb post_clkon_cb; Loading Loading @@ -96,9 +98,19 @@ static int dsi_core_clk_start(struct dsi_core_clks *c_clks) goto disable_axi_clk; } } rc = mdss_update_reg_bus_vote(mngr->reg_bus_clt, VOTE_INDEX_19_MHZ); if (rc) { pr_err("failed to vote for reg bus\n"); goto disable_mmss_misc_clk; } pr_debug("%s:CORE CLOCK IS ON\n", mngr->name); return rc; disable_mmss_misc_clk: if (c_clks->clks.mmss_misc_ahb_clk) clk_disable_unprepare(c_clks->clks.mmss_misc_ahb_clk); disable_axi_clk: clk_disable_unprepare(c_clks->clks.axi_clk); disable_ahb_clk: Loading @@ -117,6 +129,7 @@ static int dsi_core_clk_stop(struct dsi_core_clks *c_clks) mngr = container_of(c_clks, struct mdss_dsi_clk_mngr, core_clks); mdss_update_reg_bus_vote(mngr->reg_bus_clt, VOTE_INDEX_DISABLE); if (c_clks->clks.mmss_misc_ahb_clk) clk_disable_unprepare(c_clks->clks.mmss_misc_ahb_clk); clk_disable_unprepare(c_clks->clks.axi_clk); Loading Loading @@ -859,6 +872,13 @@ void *mdss_dsi_clk_init(struct mdss_dsi_clk_info *info) mngr->pre_clkoff_cb = info->pre_clkoff_cb; mngr->post_clkon_cb = info->post_clkon_cb; mngr->priv_data = info->priv_data; mngr->reg_bus_clt = mdss_reg_bus_vote_client_create(); if (IS_ERR_OR_NULL(mngr->reg_bus_clt)) { pr_err("Unable to get handle for reg bus vote\n"); kfree(mngr); mngr = ERR_PTR(-EINVAL); goto error; } memcpy(mngr->name, info->name, DSI_CLK_NAME_LEN); error: pr_debug("EXIT %s, rc = %ld\n", mngr->name, PTR_ERR(mngr)); Loading Loading @@ -892,6 +912,7 @@ int mdss_dsi_clk_deinit(void *clk_mngr) rc = dsi_recheck_clk_state(mngr); if (rc) pr_err("failed to disable all clocks\n"); mdss_reg_bus_vote_client_destroy(mngr->reg_bus_clt); mutex_unlock(&mngr->clk_mutex); pr_debug("%s: EXIT, rc = %d\n", mngr->name, rc); kfree(mngr); Loading drivers/video/msm/mdss/msm_mdss_io_8974.c +0 −19 Original line number Diff line number Diff line Loading @@ -695,10 +695,6 @@ void mdss_dsi_core_clk_deinit(struct device *dev, struct dsi_shared_data *sdata) devm_clk_put(dev, sdata->axi_clk); if (sdata->ahb_clk) devm_clk_put(dev, sdata->ahb_clk); if (sdata->reg_bus_clt) { mdss_reg_bus_vote_client_destroy(sdata->reg_bus_clt); sdata->reg_bus_clt = NULL; } if (sdata->mdp_core_clk) devm_clk_put(dev, sdata->mdp_core_clk); } Loading @@ -725,14 +721,6 @@ int mdss_dsi_core_clk_init(struct platform_device *pdev, goto error; } sdata->reg_bus_clt = mdss_reg_bus_vote_client_create(); if (IS_ERR_OR_NULL(sdata->reg_bus_clt)) { rc = PTR_ERR(sdata->reg_bus_clt); pr_err("%s: Unable to get ahb bus clk handle. rc=%d\n", __func__, rc); goto error; } sdata->ahb_clk = devm_clk_get(dev, "iface_clk"); if (IS_ERR(sdata->ahb_clk)) { rc = PTR_ERR(sdata->ahb_clk); Loading Loading @@ -1443,10 +1431,6 @@ int mdss_dsi_pre_clkoff_cb(void *priv, } } if (clk & MDSS_DSI_CORE_CLK) mdss_update_reg_bus_vote(ctrl->shared_data->reg_bus_clt, VOTE_INDEX_DISABLE); return rc; } Loading @@ -1461,9 +1445,6 @@ int mdss_dsi_post_clkon_cb(void *priv, pdata = &ctrl->panel_data; if (clk & MDSS_DSI_CORE_CLK) { mdss_update_reg_bus_vote(ctrl->shared_data->reg_bus_clt, VOTE_INDEX_19_MHZ); if (!pdata->panel_info.cont_splash_enabled) mdss_dsi_read_hw_revision(ctrl); Loading Loading
drivers/video/msm/mdss/mdss_dsi.h +0 −3 Original line number Diff line number Diff line Loading @@ -251,9 +251,6 @@ struct dsi_shared_data { struct clk *byte1_parent; struct clk *pixel1_parent; /* reg bus clock handle */ struct reg_bus_client *reg_bus_clt; /* DSI core regulators */ struct dss_module_power power_data[DSI_MAX_PM]; Loading
drivers/video/msm/mdss/mdss_dsi_clk.c +21 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,8 @@ struct mdss_dsi_clk_mngr { struct dsi_core_clks core_clks; struct dsi_link_clks link_clks; struct reg_bus_client *reg_bus_clt; pre_clockoff_cb pre_clkoff_cb; post_clockoff_cb post_clkoff_cb; post_clockon_cb post_clkon_cb; Loading Loading @@ -96,9 +98,19 @@ static int dsi_core_clk_start(struct dsi_core_clks *c_clks) goto disable_axi_clk; } } rc = mdss_update_reg_bus_vote(mngr->reg_bus_clt, VOTE_INDEX_19_MHZ); if (rc) { pr_err("failed to vote for reg bus\n"); goto disable_mmss_misc_clk; } pr_debug("%s:CORE CLOCK IS ON\n", mngr->name); return rc; disable_mmss_misc_clk: if (c_clks->clks.mmss_misc_ahb_clk) clk_disable_unprepare(c_clks->clks.mmss_misc_ahb_clk); disable_axi_clk: clk_disable_unprepare(c_clks->clks.axi_clk); disable_ahb_clk: Loading @@ -117,6 +129,7 @@ static int dsi_core_clk_stop(struct dsi_core_clks *c_clks) mngr = container_of(c_clks, struct mdss_dsi_clk_mngr, core_clks); mdss_update_reg_bus_vote(mngr->reg_bus_clt, VOTE_INDEX_DISABLE); if (c_clks->clks.mmss_misc_ahb_clk) clk_disable_unprepare(c_clks->clks.mmss_misc_ahb_clk); clk_disable_unprepare(c_clks->clks.axi_clk); Loading Loading @@ -859,6 +872,13 @@ void *mdss_dsi_clk_init(struct mdss_dsi_clk_info *info) mngr->pre_clkoff_cb = info->pre_clkoff_cb; mngr->post_clkon_cb = info->post_clkon_cb; mngr->priv_data = info->priv_data; mngr->reg_bus_clt = mdss_reg_bus_vote_client_create(); if (IS_ERR_OR_NULL(mngr->reg_bus_clt)) { pr_err("Unable to get handle for reg bus vote\n"); kfree(mngr); mngr = ERR_PTR(-EINVAL); goto error; } memcpy(mngr->name, info->name, DSI_CLK_NAME_LEN); error: pr_debug("EXIT %s, rc = %ld\n", mngr->name, PTR_ERR(mngr)); Loading Loading @@ -892,6 +912,7 @@ int mdss_dsi_clk_deinit(void *clk_mngr) rc = dsi_recheck_clk_state(mngr); if (rc) pr_err("failed to disable all clocks\n"); mdss_reg_bus_vote_client_destroy(mngr->reg_bus_clt); mutex_unlock(&mngr->clk_mutex); pr_debug("%s: EXIT, rc = %d\n", mngr->name, rc); kfree(mngr); Loading
drivers/video/msm/mdss/msm_mdss_io_8974.c +0 −19 Original line number Diff line number Diff line Loading @@ -695,10 +695,6 @@ void mdss_dsi_core_clk_deinit(struct device *dev, struct dsi_shared_data *sdata) devm_clk_put(dev, sdata->axi_clk); if (sdata->ahb_clk) devm_clk_put(dev, sdata->ahb_clk); if (sdata->reg_bus_clt) { mdss_reg_bus_vote_client_destroy(sdata->reg_bus_clt); sdata->reg_bus_clt = NULL; } if (sdata->mdp_core_clk) devm_clk_put(dev, sdata->mdp_core_clk); } Loading @@ -725,14 +721,6 @@ int mdss_dsi_core_clk_init(struct platform_device *pdev, goto error; } sdata->reg_bus_clt = mdss_reg_bus_vote_client_create(); if (IS_ERR_OR_NULL(sdata->reg_bus_clt)) { rc = PTR_ERR(sdata->reg_bus_clt); pr_err("%s: Unable to get ahb bus clk handle. rc=%d\n", __func__, rc); goto error; } sdata->ahb_clk = devm_clk_get(dev, "iface_clk"); if (IS_ERR(sdata->ahb_clk)) { rc = PTR_ERR(sdata->ahb_clk); Loading Loading @@ -1443,10 +1431,6 @@ int mdss_dsi_pre_clkoff_cb(void *priv, } } if (clk & MDSS_DSI_CORE_CLK) mdss_update_reg_bus_vote(ctrl->shared_data->reg_bus_clt, VOTE_INDEX_DISABLE); return rc; } Loading @@ -1461,9 +1445,6 @@ int mdss_dsi_post_clkon_cb(void *priv, pdata = &ctrl->panel_data; if (clk & MDSS_DSI_CORE_CLK) { mdss_update_reg_bus_vote(ctrl->shared_data->reg_bus_clt, VOTE_INDEX_19_MHZ); if (!pdata->panel_info.cont_splash_enabled) mdss_dsi_read_hw_revision(ctrl); Loading