Merge branch 'features/denx-mx28' into for-arnd-features

CONFIG_MACH_MX28EVK=y

CONFIG_MACH_STMP378X_DEVB=y

CONFIG_MACH_TX28=y

CONFIG_MACH_M28EVK=y

# CONFIG_ARM_THUMB is not set

CONFIG_NO_HZ=y

CONFIG_HIGH_RES_TIMERS=y

	select MXS_HAVE_PLATFORM_MXS_MMC

	select MXS_HAVE_PLATFORM_MXS_PWM

config MODULE_M28

	bool

	select SOC_IMX28

	select LEDS_GPIO_REGISTER

	select MXS_HAVE_AMBA_DUART

	select MXS_HAVE_PLATFORM_AUART

	select MXS_HAVE_PLATFORM_FEC

	select MXS_HAVE_PLATFORM_FLEXCAN

	select MXS_HAVE_PLATFORM_MXS_I2C

	select MXS_HAVE_PLATFORM_MXS_MMC

	select MXS_HAVE_PLATFORM_MXSFB

	select MXS_OCOTP

config MACH_TX28

	bool "Ka-Ro TX28 module"

	select MODULE_TX28

config MACH_M28EVK

	bool "Support DENX M28EVK Platform"

	select MODULE_M28

endif

obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o

obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o

obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o

obj-$(CONFIG_MACH_M28EVK)    += mach-m28evk.o

obj-$(CONFIG_MODULE_TX28) += module-tx28.o

obj-$(CONFIG_MACH_TX28)    += mach-tx28.o

	__raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,

			CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);

	/* Extra fec clock setting */

	/*

	 * Extra fec clock setting

	 * The DENX M28 uses an external clock source

	 * and the clock output must not be enabled

	 */

	if (!machine_is_m28evk()) {

		reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);

		reg &= ~BM_CLKCTRL_ENET_SLEEP;

		reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;

		__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);

	}

	/*

	 * 480 MHz seems too high to be ssp clock source directly,

		0)

#define cpu_is_mx28()		(					\

		machine_is_mx28evk() ||					\

		machine_is_m28evk() ||					\

		machine_is_tx28() ||					\

		0)