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Commit c3e0c873 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'clksrc-cleanup-for-3.10-part2' of...

Merge tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux into late/clksrc

This is the 2nd part of ARM timer clean-ups for 3.10. This series has
the following changes:

- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init

* tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux

:
  devtree: add binding documentation for sp804
  ARM: integrator-cp: convert use CLKSRC_OF for timer init
  ARM: versatile: use OF init for sp804 timer
  ARM: versatile: add versatile dtbs to dtbs target
  ARM: vexpress: remove extra timer-sp control register clearing
  ARM: dts: vexpress: disable CA9 core tile sp804 timer
  ARM: vexpress: remove sp804 OF init
  ARM: highbank: use OF init for sp804 timer
  ARM: timer-sp: convert to use CLKSRC_OF init
  OF: add empty of_device_is_available for !OF
  ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
  ARM: make machine_desc->init_time default to clocksource_of_init
  ARM: arch_timer: use full 64-bit counter for sched_clock
  ARM: make sched_clock just call a function pointer
  ARM: sched_clock: allow changing to higher frequency counter

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>

This has a nasty set of conflicts with the exynos MCT code, which was
moved in a separate branch, and then fixed up when merged in, but still
conflicts a bit here. It should have been sorted out by this merge though.
parents 228e3023 69a517b2
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+29 −0
Original line number Diff line number Diff line
ARM sp804 Dual Timers
---------------------------------------

Required properties:
- compatible: Should be "arm,sp804" & "arm,primecell"
- interrupts: Should contain the list of Dual Timer interrupts. This is the
	interrupt for timer 1 and timer 2. In the case of a single entry, it is
	the combined interrupt or if "arm,sp804-has-irq" is present that
	specifies which timer interrupt is connected.
- reg: Should contain location and length for dual timer register.
- clocks: clocks driving the dual timer hardware. This list should be 1 or 3
	clocks.	With 3 clocks, the order is timer0 clock, timer1 clock,
	apb_pclk. A single clock can also be specified if the same clock is
	used for all clock inputs.

Optional properties:
- arm,sp804-has-irq = <#>: In the case of only 1 timer irq line connected, this
	specifies if the irq connection is for timer 1 or timer 2. A value of 1
	or 2 should be used.

Example:

	timer0: timer@fc800000 {
		compatible = "arm,sp804", "arm,primecell";
		reg = <0xfc800000 0x1000>;
		interrupts = <0 0 4>, <0 1 4>;
		clocks = <&timclk1 &timclk2 &pclk>;
		clock-names = "timer1", "timer2", "apb_pclk";
	};
+1 −0
Original line number Diff line number Diff line
@@ -1180,6 +1180,7 @@ config PLAT_VERSATILE
config ARM_TIMER_SP804
	bool
	select CLKSRC_MMIO
	select CLKSRC_OF if OF
	select HAVE_SCHED_CLOCK

source arch/arm/mm/Kconfig
+2 −0
Original line number Diff line number Diff line
@@ -165,6 +165,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
	tegra30-cardhu-a04.dtb \
	tegra114-dalmore.dtb \
	tegra114-pluto.dtb
dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
	versatile-pb.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
	vexpress-v2p-ca9.dtb \
	vexpress-v2p-ca15-tc1.dtb \
+3 −3
Original line number Diff line number Diff line
@@ -24,15 +24,15 @@
	};

	timer0: timer@13000000 {
		compatible = "arm,sp804", "arm,primecell";
		compatible = "arm,integrator-cp-timer";
	};

	timer1: timer@13000100 {
		compatible = "arm,sp804", "arm,primecell";
		compatible = "arm,integrator-cp-timer";
	};

	timer2: timer@13000200 {
		compatible = "arm,sp804", "arm,primecell";
		compatible = "arm,integrator-cp-timer";
	};

	pic: pic@14000000 {
+12 −0
Original line number Diff line number Diff line
@@ -121,6 +121,18 @@
			interrupts = <0>;
		};

		timer@101e2000 {
			compatible = "arm,sp804", "arm,primecell";
			reg = <0x101e2000 0x1000>;
			interrupts = <4>;
		};

		timer@101e3000 {
			compatible = "arm,sp804", "arm,primecell";
			reg = <0x101e3000 0x1000>;
			interrupts = <5>;
		};

		gpio0: gpio@101e4000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x101e4000 0x1000>;
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