Commit c3be7acd authored Jul 23, 2013 by J Keerthy Committed by Mike Turquette Jan 17, 2014

ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock



This patch changes apll_pcie_m2_ck to fixed factor
clock as there are no configurable divider associated to m2.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

parent 7d138d3a

arch/arm/boot/dts/dra7xx-clocks.dtsi

+3 −6

Original line number	Diff line number	Diff line
		@@ -1183,13 +1183,10 @@

		apll_pcie_m2_ck: apll_pcie_m2_ck {
		#clock-cells = <0>;
		compatible = "ti,divider-clock";
		compatible = "fixed-factor-clock";
		clocks = <&apll_pcie_ck>;
		ti,max-div = <127>;
		ti,autoidle-shift = <8>;
		reg = <0x0224>;
		ti,index-starts-at-one;
		ti,invert-autoidle-bit;
		clock-mult = <1>;
		clock-div = <1>;
		};

		dpll_per_ck: dpll_per_ck {