Loading arch/arm/mach-omap2/voltage.c +7 −8 Original line number Original line Diff line number Diff line Loading @@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, unsigned long target_volt) unsigned long target_volt) { { u32 vpconfig; u32 vpconfig; u8 target_vsel, current_vsel, prm_irqst_reg; u8 target_vsel, current_vsel; int ret, timeout = 0; int ret, timeout = 0; ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); if (ret) if (ret) return ret; return ret; prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg; /* /* * Clear all pending TransactionDone interrupt/status. Typical latency * Clear all pending TransactionDone interrupt/status. Typical latency * is <3us * is <3us */ */ while (timeout++ < VP_TRANXDONE_TIMEOUT) { while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->prm_irqst_mod, prm_irqst_reg); vdd->prm_irqst_mod, vdd->prm_irqst_reg); if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) vdd->vp_data->prm_irqst_data->tranxdone_status)) break; break; udelay(1); udelay(1); Loading Loading @@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, * Depends on SMPSWAITTIMEMIN/MAX and voltage change * Depends on SMPSWAITTIMEMIN/MAX and voltage change */ */ timeout = 0; timeout = 0; omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status), vdd->vp_data->prm_irqst_data->tranxdone_status), VP_TRANXDONE_TIMEOUT, timeout); VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) if (timeout >= VP_TRANXDONE_TIMEOUT) Loading @@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, timeout = 0; timeout = 0; while (timeout++ < VP_TRANXDONE_TIMEOUT) { while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->prm_irqst_mod, prm_irqst_reg); vdd->prm_irqst_mod, vdd->prm_irqst_reg); if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) vdd->vp_data->prm_irqst_data->tranxdone_status)) break; break; udelay(1); udelay(1); Loading arch/arm/mach-omap2/voltage.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -136,6 +136,7 @@ struct omap_vdd_info { bool vp_enabled; bool vp_enabled; s16 prm_irqst_mod; s16 prm_irqst_mod; u8 prm_irqst_reg; u32 (*read_reg) (u16 mod, u8 offset); u32 (*read_reg) (u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); int (*volt_scale) (struct omap_vdd_info *vdd, int (*volt_scale) (struct omap_vdd_info *vdd, Loading arch/arm/mach-omap2/voltagedomains3xxx_data.c +2 −0 Original line number Original line Diff line number Diff line Loading @@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { static struct omap_vdd_info omap3_vdd1_info = { static struct omap_vdd_info omap3_vdd1_info = { .prm_irqst_mod = OCP_MOD, .prm_irqst_mod = OCP_MOD, .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp1_data, .vp_data = &omap3_vp1_data, .vc_data = &omap3_vc1_data, .vc_data = &omap3_vc1_data, .vfsm = &omap3_vdd1_vfsm_data, .vfsm = &omap3_vdd1_vfsm_data, Loading @@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { static struct omap_vdd_info omap3_vdd2_info = { static struct omap_vdd_info omap3_vdd2_info = { .prm_irqst_mod = OCP_MOD, .prm_irqst_mod = OCP_MOD, .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp2_data, .vp_data = &omap3_vp2_data, .vc_data = &omap3_vc2_data, .vc_data = &omap3_vc2_data, .vfsm = &omap3_vdd2_vfsm_data, .vfsm = &omap3_vdd2_vfsm_data, Loading arch/arm/mach-omap2/voltagedomains44xx_data.c +3 −0 Original line number Original line Diff line number Diff line Loading @@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { static struct omap_vdd_info omap4_vdd_mpu_info = { static struct omap_vdd_info omap4_vdd_mpu_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .vp_data = &omap4_vp_mpu_data, .vp_data = &omap4_vp_mpu_data, .vc_data = &omap4_vc_mpu_data, .vc_data = &omap4_vc_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, .vfsm = &omap4_vdd_mpu_vfsm_data, Loading @@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { static struct omap_vdd_info omap4_vdd_iva_info = { static struct omap_vdd_info omap4_vdd_iva_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_iva_data, .vp_data = &omap4_vp_iva_data, .vc_data = &omap4_vc_iva_data, .vc_data = &omap4_vc_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, .vfsm = &omap4_vdd_iva_vfsm_data, Loading @@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { static struct omap_vdd_info omap4_vdd_core_info = { static struct omap_vdd_info omap4_vdd_core_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_core_data, .vp_data = &omap4_vp_core_data, .vc_data = &omap4_vc_core_data, .vc_data = &omap4_vc_core_data, .vfsm = &omap4_vdd_core_vfsm_data, .vfsm = &omap4_vdd_core_vfsm_data, Loading arch/arm/mach-omap2/vp.h +0 −3 Original line number Original line Diff line number Diff line Loading @@ -70,16 +70,13 @@ struct omap_vp_common_data { /** /** * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg * * * XXX prm_irqst_reg does not belong here * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a * hardware bug * hardware bug * XXX This structure is probably not needed * XXX This structure is probably not needed */ */ struct omap_vp_prm_irqst_data { struct omap_vp_prm_irqst_data { u8 prm_irqst_reg; u32 tranxdone_status; u32 tranxdone_status; }; }; Loading Loading
arch/arm/mach-omap2/voltage.c +7 −8 Original line number Original line Diff line number Diff line Loading @@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, unsigned long target_volt) unsigned long target_volt) { { u32 vpconfig; u32 vpconfig; u8 target_vsel, current_vsel, prm_irqst_reg; u8 target_vsel, current_vsel; int ret, timeout = 0; int ret, timeout = 0; ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); if (ret) if (ret) return ret; return ret; prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg; /* /* * Clear all pending TransactionDone interrupt/status. Typical latency * Clear all pending TransactionDone interrupt/status. Typical latency * is <3us * is <3us */ */ while (timeout++ < VP_TRANXDONE_TIMEOUT) { while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->prm_irqst_mod, prm_irqst_reg); vdd->prm_irqst_mod, vdd->prm_irqst_reg); if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) vdd->vp_data->prm_irqst_data->tranxdone_status)) break; break; udelay(1); udelay(1); Loading Loading @@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, * Depends on SMPSWAITTIMEMIN/MAX and voltage change * Depends on SMPSWAITTIMEMIN/MAX and voltage change */ */ timeout = 0; timeout = 0; omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status), vdd->vp_data->prm_irqst_data->tranxdone_status), VP_TRANXDONE_TIMEOUT, timeout); VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) if (timeout >= VP_TRANXDONE_TIMEOUT) Loading @@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, timeout = 0; timeout = 0; while (timeout++ < VP_TRANXDONE_TIMEOUT) { while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, vdd->prm_irqst_mod, prm_irqst_reg); vdd->prm_irqst_mod, vdd->prm_irqst_reg); if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) vdd->vp_data->prm_irqst_data->tranxdone_status)) break; break; udelay(1); udelay(1); Loading
arch/arm/mach-omap2/voltage.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -136,6 +136,7 @@ struct omap_vdd_info { bool vp_enabled; bool vp_enabled; s16 prm_irqst_mod; s16 prm_irqst_mod; u8 prm_irqst_reg; u32 (*read_reg) (u16 mod, u8 offset); u32 (*read_reg) (u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); int (*volt_scale) (struct omap_vdd_info *vdd, int (*volt_scale) (struct omap_vdd_info *vdd, Loading
arch/arm/mach-omap2/voltagedomains3xxx_data.c +2 −0 Original line number Original line Diff line number Diff line Loading @@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { static struct omap_vdd_info omap3_vdd1_info = { static struct omap_vdd_info omap3_vdd1_info = { .prm_irqst_mod = OCP_MOD, .prm_irqst_mod = OCP_MOD, .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp1_data, .vp_data = &omap3_vp1_data, .vc_data = &omap3_vc1_data, .vc_data = &omap3_vc1_data, .vfsm = &omap3_vdd1_vfsm_data, .vfsm = &omap3_vdd1_vfsm_data, Loading @@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { static struct omap_vdd_info omap3_vdd2_info = { static struct omap_vdd_info omap3_vdd2_info = { .prm_irqst_mod = OCP_MOD, .prm_irqst_mod = OCP_MOD, .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp2_data, .vp_data = &omap3_vp2_data, .vc_data = &omap3_vc2_data, .vc_data = &omap3_vc2_data, .vfsm = &omap3_vdd2_vfsm_data, .vfsm = &omap3_vdd2_vfsm_data, Loading
arch/arm/mach-omap2/voltagedomains44xx_data.c +3 −0 Original line number Original line Diff line number Diff line Loading @@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { static struct omap_vdd_info omap4_vdd_mpu_info = { static struct omap_vdd_info omap4_vdd_mpu_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .vp_data = &omap4_vp_mpu_data, .vp_data = &omap4_vp_mpu_data, .vc_data = &omap4_vc_mpu_data, .vc_data = &omap4_vc_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, .vfsm = &omap4_vdd_mpu_vfsm_data, Loading @@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { static struct omap_vdd_info omap4_vdd_iva_info = { static struct omap_vdd_info omap4_vdd_iva_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_iva_data, .vp_data = &omap4_vp_iva_data, .vc_data = &omap4_vc_iva_data, .vc_data = &omap4_vc_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, .vfsm = &omap4_vdd_iva_vfsm_data, Loading @@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { static struct omap_vdd_info omap4_vdd_core_info = { static struct omap_vdd_info omap4_vdd_core_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_core_data, .vp_data = &omap4_vp_core_data, .vc_data = &omap4_vc_core_data, .vc_data = &omap4_vc_core_data, .vfsm = &omap4_vdd_core_vfsm_data, .vfsm = &omap4_vdd_core_vfsm_data, Loading
arch/arm/mach-omap2/vp.h +0 −3 Original line number Original line Diff line number Diff line Loading @@ -70,16 +70,13 @@ struct omap_vp_common_data { /** /** * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg * * * XXX prm_irqst_reg does not belong here * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a * hardware bug * hardware bug * XXX This structure is probably not needed * XXX This structure is probably not needed */ */ struct omap_vp_prm_irqst_data { struct omap_vp_prm_irqst_data { u8 prm_irqst_reg; u32 tranxdone_status; u32 tranxdone_status; }; }; Loading