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Commit c3310e77 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc 

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  powerpc/ps3: Fix build error on UP
  powerpc/cell: Select PCI for IBM_CELL_BLADE AND CELLEB
  powerpc: ppc32 needs elf_read_implies_exec()
  powerpc/86xx: Add device_type entry to soc for ppc9a
  powerpc/44x: Correct memory size calculation for denali-based boards
  maintainers: Fix PowerPC 4xx git tree
  powerpc: fix for long standing bug noticed by gcc 4.4.0
  Revert "powerpc: Add support for early tlbilx opcode"
parents 13beadd9 d8f48457

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -3448,7 +3448,7 @@ P: Matt Porter 
M:	mporter@kernel.crashing.org

W:	http://www.penguinppc.org/

L:	linuxppc-dev@ozlabs.org

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc.git

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx.git

S:	Maintained



LINUX FOR POWERPC EMBEDDED XILINX VIRTEX

arch/powerpc/boot/4xx.c

+43 −13
Original line number Diff line number Diff line
@@ -158,21 +158,33 @@ void ibm440spe_fixup_memsize(void) 


#define DDR_GET_VAL(val, mask, shift)	(((val) >> (shift)) & (mask))



void ibm4xx_denali_fixup_memsize(void)

/*

 * Some U-Boot versions set the number of chipselects to two

 * for Sequoia/Rainier boards while they only have one chipselect

 * hardwired. Hardcode the number of chipselects to one

 * for sequioa/rainer board models or read the actual value

 * from the memory controller register DDR0_10 otherwise.

 */

static inline u32 ibm4xx_denali_get_cs(void)

{

	u32 val, max_cs, max_col, max_row;

	u32 cs, col, row, bank, dpath;

	unsigned long memsize;

	void *devp;

	char model[64];

	u32 val, cs;



	val = SDRAM0_READ(DDR0_02);

	if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))

		fatal("DDR controller is not initialized\n");

	devp = finddevice("/");

	if (!devp)

		goto read_cs;



	/* get maximum cs col and row values */

	max_cs  = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);

	max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);

	max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);

	if (getprop(devp, "model", model, sizeof(model)) <= 0)

		goto read_cs;



	model[sizeof(model)-1] = 0;



	if (!strcmp(model, "amcc,sequoia") ||

	    !strcmp(model, "amcc,rainier"))

		return 1;



read_cs:

	/* get CS value */

	val = SDRAM0_READ(DDR0_10);
@@ -183,7 +195,25 @@ void ibm4xx_denali_fixup_memsize(void) 
			cs++;

		val = val >> 1;

	}

	return cs;

}



void ibm4xx_denali_fixup_memsize(void)

{

	u32 val, max_cs, max_col, max_row;

	u32 cs, col, row, bank, dpath;

	unsigned long memsize;



	val = SDRAM0_READ(DDR0_02);

	if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))

		fatal("DDR controller is not initialized\n");



	/* get maximum cs col and row values */

	max_cs  = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);

	max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);

	max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);



	cs = ibm4xx_denali_get_cs();

	if (!cs)

		fatal("No memory installed\n");

	if (cs > max_cs)
@@ -193,9 +223,9 @@ void ibm4xx_denali_fixup_memsize(void) 
	val = SDRAM0_READ(DDR0_14);



	if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))

		dpath = 8; /* 64 bits */

	else

		dpath = 4; /* 32 bits */

	else

		dpath = 8; /* 64 bits */



	/* get address pins (rows) */

 	val = SDRAM0_READ(DDR0_42);

arch/powerpc/boot/dts/gef_ppc9a.dts

+1 −0
Original line number Diff line number Diff line
@@ -161,6 +161,7 @@ 
		#address-cells = <1>;

		#size-cells = <1>;

		#interrupt-cells = <2>;

		device_type = "soc";

		compatible = "fsl,mpc8641-soc", "simple-bus";

		ranges = <0x0 0xfef00000 0x00100000>;

		reg = <0xfef00000 0x100000>;	// CCSRBAR 1M

arch/powerpc/include/asm/elf.h

+1 −0
Original line number Diff line number Diff line
@@ -260,6 +260,7 @@ do { \ 
#else 

# define SET_PERSONALITY(ex) \

  set_personality(PER_LINUX | (current->personality & (~PER_MASK)))

# define elf_read_implies_exec(ex, exec_stk) (exec_stk != EXSTACK_DISABLE_X)

#endif /* __powerpc64__ */



extern int dcache_bsize;

arch/powerpc/include/asm/mmu.h

+0 −6
Original line number Diff line number Diff line
@@ -52,12 +52,6 @@ 
 */

#define MMU_FTR_NEED_DTLB_SW_LRU	ASM_CONST(0x00200000)



/* This indicates that the processor uses the wrong opcode for tlbilx

 * instructions.  During the ISA 2.06 development the opcode for tlbilx

 * changed and some early implementations used to old opcode

 */

#define MMU_FTR_TLBILX_EARLY_OPCODE	ASM_CONST(0x00400000)



#ifndef __ASSEMBLY__

#include <asm/cputable.h>