Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c23fd751 authored by Jarkko Nikula's avatar Jarkko Nikula Committed by Liam Girdwood
Browse files

ASoC: tlv320aic3x: Optimize PLL programming in aic3x_set_bias_level



There is only need to enable/disable once the PLL when the bias is going
between on, prepare, standby and off states.

Signed-off-by: default avatarJarkko Nikula <jhnikula@gmail.com>
Acked-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
parent 3484457f
Loading
Loading
Loading
Loading
+6 −4
Original line number Diff line number Diff line
@@ -1069,7 +1069,8 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec,
	case SND_SOC_BIAS_ON:
		break;
	case SND_SOC_BIAS_PREPARE:
		if (aic3x->master) {
		if (codec->bias_level == SND_SOC_BIAS_STANDBY &&
		    aic3x->master) {
			/* enable pll */
			reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG);
			aic3x_write(codec, AIC3X_PLL_PROGA_REG,
@@ -1077,15 +1078,16 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec,
		}
		break;
	case SND_SOC_BIAS_STANDBY:
		/* fall through and disable pll */
	case SND_SOC_BIAS_OFF:
		if (aic3x->master) {
		if (codec->bias_level == SND_SOC_BIAS_PREPARE &&
		    aic3x->master) {
			/* disable pll */
			reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG);
			aic3x_write(codec, AIC3X_PLL_PROGA_REG,
				    reg & ~PLL_ENABLE);
		}
		break;
	case SND_SOC_BIAS_OFF:
		break;
	}
	codec->bias_level = level;