Merge "ARM: dts: msm: Connect CTI trig to GPIO on MDMCALIFORNIUM" (c2380d54) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/mdmcalifornium-coresight.dtsi

+5 −3

Original line number	Diff line number	Diff line
		/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -342,6 +342,10 @@
		clocks = <&clock_gcc clk_qdss_clk>,
		<&clock_gcc clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,cti-gpio-trigout = <4>;
		pinctrl-names = "cti-trigout-pctrl";
		pinctrl-0 = <&trigout_a>;
		};

		cti3: cti@813000 {
		@@ -447,14 +451,12 @@
		hwevent: hwevent@86c000 {
		compatible = "qcom,coresight-hwevent";
		reg = <0x0086c000 0x148>,
		<0x00801020 0x10>,
		<0x08af8860 0x4>,
		<0x0200c000 0x4>,
		<0x0200c008 0x20>,
		<0x08b05014 0x4>,
		<0x0408200c 0x4>;
		reg-names = "qdss-wrapper",
		"stm",
		"usb30",
		"spmi-test",
		"spmi-events",

+12 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,18 @@
		};
		};

		trigout_a: trigout_a {
		mux {
		pins = "gpio92";
		function = "qdss_cti";
		};
		config {
		pins = "gpio92";
		drive-strength = <2>;
		bias-disable;
		};
		};

		uart2_console_active: uart2_console_active {
		mux {
		pins = "gpio4", "gpio5";