Loading arch/arm/boot/dts/qcom/apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dts +4 −2 Original line number Diff line number Diff line Loading @@ -270,8 +270,10 @@ qcom,msm-mi2s-rx-lines = <2>; qcom,msm-mi2s-tx-lines = <1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>; pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep>; pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>; pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>; }; }; }; arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +31 −4 Original line number Diff line number Diff line Loading @@ -1643,24 +1643,24 @@ quat_mi2s { quat_mi2s_sleep: quat_mi2s_sleep { mux { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; function = "qua_mi2s"; }; config { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; drive-strength = <2>; /* 2 mA */ bias-pull-down; /* PULL DOWN */ }; }; quat_mi2s_active: quat_mi2s_active { mux { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; function = "qua_mi2s"; }; config { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; drive-strength = <8>; /* 8 mA */ bias-disable; /* NO PULL */ output-high; Loading @@ -1668,6 +1668,33 @@ }; }; quat_mi2s_sd1 { quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { mux { pins = "gpio61"; function = "qua_mi2s"; }; config { pins = "gpio61"; drive-strength = <2>; /* 2 mA */ bias-pull-down; /* PULL DOWN */ }; }; quat_mi2s_sd1_active: quat_mi2s_sd1_active { mux { pins = "gpio61"; function = "qua_mi2s"; }; config { pins = "gpio61"; drive-strength = <8>; /* 8 mA */ bias-disable; /* NO PULL */ }; }; }; quat_mi2s_sd0 { quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { mux { Loading Loading
arch/arm/boot/dts/qcom/apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dts +4 −2 Original line number Diff line number Diff line Loading @@ -270,8 +270,10 @@ qcom,msm-mi2s-rx-lines = <2>; qcom,msm-mi2s-tx-lines = <1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>; pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep>; pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>; pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>; }; }; };
arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +31 −4 Original line number Diff line number Diff line Loading @@ -1643,24 +1643,24 @@ quat_mi2s { quat_mi2s_sleep: quat_mi2s_sleep { mux { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; function = "qua_mi2s"; }; config { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; drive-strength = <2>; /* 2 mA */ bias-pull-down; /* PULL DOWN */ }; }; quat_mi2s_active: quat_mi2s_active { mux { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; function = "qua_mi2s"; }; config { pins = "gpio58", "gpio59", "gpio61"; pins = "gpio58", "gpio59"; drive-strength = <8>; /* 8 mA */ bias-disable; /* NO PULL */ output-high; Loading @@ -1668,6 +1668,33 @@ }; }; quat_mi2s_sd1 { quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { mux { pins = "gpio61"; function = "qua_mi2s"; }; config { pins = "gpio61"; drive-strength = <2>; /* 2 mA */ bias-pull-down; /* PULL DOWN */ }; }; quat_mi2s_sd1_active: quat_mi2s_sd1_active { mux { pins = "gpio61"; function = "qua_mi2s"; }; config { pins = "gpio61"; drive-strength = <8>; /* 8 mA */ bias-disable; /* NO PULL */ }; }; }; quat_mi2s_sd0 { quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { mux { Loading