clk: msm: clock-gcc-californium: Update pcie_aux_clk_src freq_table

The gcc_pcie_sleep_clk needs to runs at 19.2 MHz, so update
the frequency table of the parent rcg to allow this.

CRs-Fixed: 920470
Change-Id: Iac8c305b0291dcb7cbbb85e4101bf41a1065e79e
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>