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Commit c137c607 authored by Yijing Wang's avatar Yijing Wang Committed by Alex Shi
Browse files

PCI: xilinx: Save MSI controller in pci_sys_data 



Save MSI controller in pci_sys_data instead of assigning MSI controller
pointer to every PCI bus in .add_bus().

[bhelgaas: use xilinx_pcie_msi_chip, not xilinx_pcie_msi_controller]
Signed-off-by: default avatarYijing Wang <wangyijing@huawei.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit 8dd26dc8fecab05aa92cd7f109f691c1283c5a13)

Signed-off-by: default avatarAlex Shi <alex.shi@linaro.org>
parent 0223d292

drivers/pci/host/pcie-xilinx.c

+5 −15
Original line number Original line Diff line number Diff line
@@ -432,20 +432,6 @@ static void xilinx_pcie_enable_msi(struct xilinx_pcie_port *port) 
	pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2);

	pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2);

}

}





/**

 * xilinx_pcie_add_bus - Add MSI chip info to PCIe bus

 * @bus: PCIe bus

 */

static void xilinx_pcie_add_bus(struct pci_bus *bus)

{

	if (IS_ENABLED(CONFIG_PCI_MSI)) {

		struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);



		xilinx_pcie_msi_chip.dev = port->dev;

		bus->msi = &xilinx_pcie_msi_chip;

	}

}



/* INTx Functions */

/* INTx Functions */





/**

/**
@@ -925,10 +911,14 @@ static int xilinx_pcie_probe(struct platform_device *pdev) 
		.private_data	= (void **)&port,

		.private_data	= (void **)&port,

		.setup		= xilinx_pcie_setup,

		.setup		= xilinx_pcie_setup,

		.map_irq	= of_irq_parse_and_map_pci,

		.map_irq	= of_irq_parse_and_map_pci,

		.add_bus	= xilinx_pcie_add_bus,

		.scan		= xilinx_pcie_scan_bus,

		.scan		= xilinx_pcie_scan_bus,

		.ops		= &xilinx_pcie_ops,

		.ops		= &xilinx_pcie_ops,

	};

	};



#ifdef CONFIG_PCI_MSI

	xilinx_pcie_msi_chip.dev = port->dev;

	hw.msi_ctrl = &xilinx_pcie_msi_chip;

#endif

	pci_common_init_dev(dev, &hw);

	pci_common_init_dev(dev, &hw);





	return 0;

	return 0;