Loading sound/soc/codecs/wcd9335.c +128 −60 Original line number Diff line number Diff line Loading @@ -5912,15 +5912,67 @@ static int tasha_pinctl_mode_put(struct snd_kcontrol *kcontrol, return 0; } static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, static void wcd_vbat_adc_out_config_2_0(struct wcd_vbat *vbat, struct snd_soc_codec *codec) { u8 val1, val2; if (!vbat->adc_config) { tasha_cdc_mclk_enable(codec, true, false); /* * Measure dcp1 by using "ALT" branch of band gap * voltage(Vbg) and use it in FAST mode */ snd_soc_update_bits(codec, WCD9335_BIAS_CTL, 0x82, 0x82); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x10); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x01, 0x01); snd_soc_update_bits(codec, WCD9335_ANA_VBADC, 0x80, 0x80); snd_soc_update_bits(codec, WCD9335_VBADC_SUBBLOCK_EN, 0x20, 0x00); snd_soc_update_bits(codec, WCD9335_VBADC_FE_CTRL, 0x20, 0x20); /* Wait 100 usec after calibration select as Vbg */ usleep_range(100, 110); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x40); val1 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTMSB); val2 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTLSB); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x00); vbat->dcp1 = (((val1 & 0xFF) << 3) | (val2 & 0x07)); snd_soc_update_bits(codec, WCD9335_BIAS_CTL, 0x40, 0x40); /* Wait 100 usec after selecting Vbg as 1.05V */ usleep_range(100, 110); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x40); val1 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTMSB); val2 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTLSB); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x00); vbat->dcp2 = (((val1 & 0xFF) << 3) | (val2 & 0x07)); dev_dbg(codec->dev, "%s: dcp1:0x%x, dcp2:0x%x\n", __func__, vbat->dcp1, vbat->dcp2); snd_soc_write(codec, WCD9335_BIAS_CTL, 0x28); /* Wait 100 usec after selecting Vbg as 0.85V */ usleep_range(100, 110); /* Measure dcp1 by applying band gap voltage(Vbg) of 0.85V */ snd_soc_update_bits(codec, WCD9335_VBADC_FE_CTRL, 0x20, 0x00); snd_soc_update_bits(codec, WCD9335_VBADC_SUBBLOCK_EN, 0x20, 0x20); snd_soc_update_bits(codec, WCD9335_ANA_VBADC, 0x80, 0x00); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x00); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x01, 0x00); } static void wcd_vbat_adc_out_config_1_x(struct wcd_vbat *vbat, struct snd_soc_codec *codec) { u8 val1, val2; /* * Measure dcp1 by applying band gap voltage(Vbg) * of 0.85V */ snd_soc_write(codec, WCD9335_ANA_BIAS, 0x20); snd_soc_write(codec, WCD9335_BIAS_CTL, 0x28); snd_soc_write(codec, WCD9335_BIAS_VBG_FINE_ADJ, 0x05); Loading @@ -5930,8 +5982,7 @@ static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, snd_soc_write(codec, WCD9335_ANA_CLK_TOP, 0x82); snd_soc_write(codec, WCD9335_ANA_CLK_TOP, 0x87); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x10); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x10); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_CFG, 0x0D); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x01); Loading @@ -5948,7 +5999,10 @@ static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, vbat->dcp1 = (((val1 & 0xFF) << 3) | (val2 & 0x07)); /* Measure dcp2 by applying band gap voltage(Vbg) of 1.05V */ /* * Measure dcp2 by applying band gap voltage(Vbg) * of 1.05V */ snd_soc_write(codec, WCD9335_ANA_BIAS, 0x80); snd_soc_write(codec, WCD9335_ANA_BIAS, 0xC0); snd_soc_write(codec, WCD9335_BIAS_CTL, 0x68); Loading Loading @@ -5989,6 +6043,20 @@ static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x00); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x00); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_CFG, 0x0A); } static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, struct snd_soc_codec *codec) { struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent); if (!vbat->adc_config) { tasha_cdc_mclk_enable(codec, true, false); if (TASHA_IS_2_0(wcd9xxx->version)) wcd_vbat_adc_out_config_2_0(vbat, codec); else wcd_vbat_adc_out_config_1_x(vbat, codec); tasha_cdc_mclk_enable(codec, false, false); vbat->adc_config = true; Loading Loading
sound/soc/codecs/wcd9335.c +128 −60 Original line number Diff line number Diff line Loading @@ -5912,15 +5912,67 @@ static int tasha_pinctl_mode_put(struct snd_kcontrol *kcontrol, return 0; } static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, static void wcd_vbat_adc_out_config_2_0(struct wcd_vbat *vbat, struct snd_soc_codec *codec) { u8 val1, val2; if (!vbat->adc_config) { tasha_cdc_mclk_enable(codec, true, false); /* * Measure dcp1 by using "ALT" branch of band gap * voltage(Vbg) and use it in FAST mode */ snd_soc_update_bits(codec, WCD9335_BIAS_CTL, 0x82, 0x82); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x10); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x01, 0x01); snd_soc_update_bits(codec, WCD9335_ANA_VBADC, 0x80, 0x80); snd_soc_update_bits(codec, WCD9335_VBADC_SUBBLOCK_EN, 0x20, 0x00); snd_soc_update_bits(codec, WCD9335_VBADC_FE_CTRL, 0x20, 0x20); /* Wait 100 usec after calibration select as Vbg */ usleep_range(100, 110); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x40); val1 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTMSB); val2 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTLSB); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x00); vbat->dcp1 = (((val1 & 0xFF) << 3) | (val2 & 0x07)); snd_soc_update_bits(codec, WCD9335_BIAS_CTL, 0x40, 0x40); /* Wait 100 usec after selecting Vbg as 1.05V */ usleep_range(100, 110); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x40); val1 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTMSB); val2 = snd_soc_read(codec, WCD9335_VBADC_ADC_DOUTLSB); snd_soc_update_bits(codec, WCD9335_VBADC_ADC_IO, 0x40, 0x00); vbat->dcp2 = (((val1 & 0xFF) << 3) | (val2 & 0x07)); dev_dbg(codec->dev, "%s: dcp1:0x%x, dcp2:0x%x\n", __func__, vbat->dcp1, vbat->dcp2); snd_soc_write(codec, WCD9335_BIAS_CTL, 0x28); /* Wait 100 usec after selecting Vbg as 0.85V */ usleep_range(100, 110); /* Measure dcp1 by applying band gap voltage(Vbg) of 0.85V */ snd_soc_update_bits(codec, WCD9335_VBADC_FE_CTRL, 0x20, 0x00); snd_soc_update_bits(codec, WCD9335_VBADC_SUBBLOCK_EN, 0x20, 0x20); snd_soc_update_bits(codec, WCD9335_ANA_VBADC, 0x80, 0x00); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x00); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x01, 0x00); } static void wcd_vbat_adc_out_config_1_x(struct wcd_vbat *vbat, struct snd_soc_codec *codec) { u8 val1, val2; /* * Measure dcp1 by applying band gap voltage(Vbg) * of 0.85V */ snd_soc_write(codec, WCD9335_ANA_BIAS, 0x20); snd_soc_write(codec, WCD9335_BIAS_CTL, 0x28); snd_soc_write(codec, WCD9335_BIAS_VBG_FINE_ADJ, 0x05); Loading @@ -5930,8 +5982,7 @@ static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, snd_soc_write(codec, WCD9335_ANA_CLK_TOP, 0x82); snd_soc_write(codec, WCD9335_ANA_CLK_TOP, 0x87); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x10); snd_soc_update_bits(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x10, 0x10); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_CFG, 0x0D); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x01); Loading @@ -5948,7 +5999,10 @@ static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, vbat->dcp1 = (((val1 & 0xFF) << 3) | (val2 & 0x07)); /* Measure dcp2 by applying band gap voltage(Vbg) of 1.05V */ /* * Measure dcp2 by applying band gap voltage(Vbg) * of 1.05V */ snd_soc_write(codec, WCD9335_ANA_BIAS, 0x80); snd_soc_write(codec, WCD9335_ANA_BIAS, 0xC0); snd_soc_write(codec, WCD9335_BIAS_CTL, 0x68); Loading Loading @@ -5989,6 +6043,20 @@ static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_DEBUG1, 0x00); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_PATH_CTL, 0x00); snd_soc_write(codec, WCD9335_CDC_VBAT_VBAT_CFG, 0x0A); } static void wcd_vbat_adc_out_config(struct wcd_vbat *vbat, struct snd_soc_codec *codec) { struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent); if (!vbat->adc_config) { tasha_cdc_mclk_enable(codec, true, false); if (TASHA_IS_2_0(wcd9xxx->version)) wcd_vbat_adc_out_config_2_0(vbat, codec); else wcd_vbat_adc_out_config_1_x(vbat, codec); tasha_cdc_mclk_enable(codec, false, false); vbat->adc_config = true; Loading