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Commit bef9ae3d authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: Switch remaining assembler PAGE_SIZE users to <asm/asm-offsets.h>. 



Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 20082595

arch/mips/kernel/genex.S

+2 −3
Original line number Diff line number Diff line
@@ -19,7 +19,6 @@ 
#include <asm/mipsregs.h>

#include <asm/stackframe.h>

#include <asm/war.h>

#include <asm/page.h>

#include <asm/thread_info.h>



#define PANIC_PIC(msg)					\
@@ -483,8 +482,8 @@ NESTED(nmi_handler, PT_SIZE, sp) 
	MFC0	k1, CP0_ENTRYHI

	andi	k1, 0xff	/* ASID_MASK */

	MFC0	k0, CP0_EPC

	PTR_SRL	k0, PAGE_SHIFT + 1

	PTR_SLL	k0, PAGE_SHIFT + 1

	PTR_SRL	k0, _PAGE_SHIFT + 1

	PTR_SLL	k0, _PAGE_SHIFT + 1

	or	k1, k0

	MTC0	k1, CP0_ENTRYHI

	mtc0_tlbw_hazard

arch/mips/kernel/relocate_kernel.S

+1 −2
Original line number Diff line number Diff line
@@ -9,7 +9,6 @@ 
#include <asm/asm.h>

#include <asm/asmmacro.h>

#include <asm/regdef.h>

#include <asm/page.h>

#include <asm/mipsregs.h>

#include <asm/stackframe.h>

#include <asm/addrspace.h>
@@ -50,7 +49,7 @@ process_entry: 
	and		s3, s2, 0x8

	beq		s3, zero, process_entry

	and		s2, s2, ~0x8

	li		s6, (1 << PAGE_SHIFT) / SZREG

	li		s6, (1 << _PAGE_SHIFT) / SZREG



copy_word:

	/* copy page word by word */

arch/mips/kernel/vmlinux.lds.S

+2 −1
Original line number Diff line number Diff line 
#include <asm/asm-offsets.h>

#include <asm/page.h>

#include <asm/thread_info.h>



#define PAGE_SIZE _PAGE_SIZE



/*

 * Put .bss..swapper_pg_dir as the first thing in .bss. This will

 * ensure that it has .bss alignment (64K).

arch/mips/power/hibernate.S

+1 −2
Original line number Diff line number Diff line
@@ -8,7 +8,6 @@ 
 *         Wu Zhangjin <wuzhangjin@gmail.com>

 */

#include <asm/asm-offsets.h>

#include <asm/page.h>

#include <asm/regdef.h>

#include <asm/asm.h>
@@ -35,7 +34,7 @@ LEAF(swsusp_arch_resume) 
0:

	PTR_L t1, PBE_ADDRESS(t0)   /* source */

	PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */

	PTR_ADDU t3, t1, PAGE_SIZE

	PTR_ADDU t3, t1, _PAGE_SIZE

1:

	REG_L t8, (t1)

	REG_S t8, (t2)