Merge branch 'next/topic-cpuid-rev' into next/topic-add-exynos4212 (be6bb8cc) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/mach-exynos4/cpu.c

+23 −5

Original line number	Original line	Diff line number	Diff line
	@@ -43,11 +43,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
	.pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),		.pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
	.length = SZ_4K,		.length = SZ_4K,
	.type = MT_DEVICE,		.type = MT_DEVICE,
	}, {
	.virtual = (unsigned long)S5P_VA_SYSRAM,
	.pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM),
	.length = SZ_4K,
	.type = MT_DEVICE,
	}, {		}, {
	.virtual = (unsigned long)S5P_VA_CMU,		.virtual = (unsigned long)S5P_VA_CMU,
	.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),		.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
	@@ -121,6 +116,24 @@ static struct map_desc exynos4_iodesc[] __initdata = {
	},		},
	};		};

			static struct map_desc exynos4_iodesc0[] __initdata = {
			{
			.virtual = (unsigned long)S5P_VA_SYSRAM,
			.pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
			.length = SZ_4K,
			.type = MT_DEVICE,
			},
			};

			static struct map_desc exynos4_iodesc1[] __initdata = {
			{
			.virtual = (unsigned long)S5P_VA_SYSRAM,
			.pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
			.length = SZ_4K,
			.type = MT_DEVICE,
			},
			};

	static void exynos4_idle(void)		static void exynos4_idle(void)
	{		{
	if (!need_resched())		if (!need_resched())
	@@ -143,6 +156,11 @@ void __init exynos4_map_io(void)
	{		{
	iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));		iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));

			if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
			iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
			else
			iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));

	/* initialize device information early */		/* initialize device information early */
	exynos4_default_sdhci0();		exynos4_default_sdhci0();
	exynos4_default_sdhci1();		exynos4_default_sdhci1();

arch/arm/mach-exynos4/include/mach/map.h

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -23,7 +23,8 @@

	#include <plat/map-s5p.h>		#include <plat/map-s5p.h>

	#define EXYNOS4_PA_SYSRAM 0x02020000		#define EXYNOS4_PA_SYSRAM0 0x02025000
			#define EXYNOS4_PA_SYSRAM1 0x02020000

	#define EXYNOS4_PA_FIMC0 0x11800000		#define EXYNOS4_PA_FIMC0 0x11800000
	#define EXYNOS4_PA_FIMC1 0x11810000		#define EXYNOS4_PA_FIMC1 0x11810000

arch/arm/mach-exynos4/platsmp.c

+6 −2

Original line number	Original line	Diff line number	Diff line
	@@ -30,9 +30,12 @@
	#include <mach/regs-clock.h>		#include <mach/regs-clock.h>
	#include <mach/regs-pmu.h>		#include <mach/regs-pmu.h>

			#include <plat/cpu.h>

	extern void exynos4_secondary_startup(void);		extern void exynos4_secondary_startup(void);

	#define CPU1_BOOT_REG S5P_VA_SYSRAM		#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
			S5P_INFORM5 : S5P_VA_SYSRAM)

	/*		/*
	* control for which core is the next to come out of the secondary		* control for which core is the next to come out of the secondary
	@@ -218,5 +221,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
	* until it receives a soft interrupt, and then the		* until it receives a soft interrupt, and then the
	* secondary CPU branches to this address.		* secondary CPU branches to this address.
	*/		*/
	__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);		__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
			CPU1_BOOT_REG);
	}		}

arch/arm/mach-s3c64xx/cpu.c

+7 −15

Original line number	Original line	Diff line number	Diff line
	@@ -43,16 +43,16 @@ static const char name_s3c6410[] = "S3C6410";

	static struct cpu_table cpu_ids[] __initdata = {		static struct cpu_table cpu_ids[] __initdata = {
	{		{
	.idcode = 0x36400000,		.idcode = S3C6400_CPU_ID,
	.idmask = 0xfffff000,		.idmask = S3C64XX_CPU_MASK,
	.map_io = s3c6400_map_io,		.map_io = s3c6400_map_io,
	.init_clocks = s3c6400_init_clocks,		.init_clocks = s3c6400_init_clocks,
	.init_uarts = s3c6400_init_uarts,		.init_uarts = s3c6400_init_uarts,
	.init = s3c6400_init,		.init = s3c6400_init,
	.name = name_s3c6400,		.name = name_s3c6400,
	}, {		}, {
	.idcode = 0x36410100,		.idcode = S3C6410_CPU_ID,
	.idmask = 0xffffff00,		.idmask = S3C64XX_CPU_MASK,
	.map_io = s3c6410_map_io,		.map_io = s3c6410_map_io,
	.init_clocks = s3c6410_init_clocks,		.init_clocks = s3c6410_init_clocks,
	.init_uarts = s3c6410_init_uarts,		.init_uarts = s3c6410_init_uarts,
	@@ -140,22 +140,14 @@ void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)

	void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)		void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
	{		{
	unsigned long idcode;

	/* initialise the io descriptors we need for initialisation */		/* initialise the io descriptors we need for initialisation */
	iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));		iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
	iotable_init(mach_desc, size);		iotable_init(mach_desc, size);

	idcode = __raw_readl(S3C_VA_SYS + 0x118);		/* detect cpu id */
	if (!idcode) {		s3c64xx_init_cpu();
	/* S3C6400 has the ID register in a different place,
	* and needs a write before it can be read. */

	__raw_writel(0x0, S3C_VA_SYS + 0xA1C);
	idcode = __raw_readl(S3C_VA_SYS + 0xA1C);
	}

	s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));		s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
	}		}

	static __init int s3c64xx_sysdev_init(void)		static __init int s3c64xx_sysdev_init(void)

arch/arm/mach-s5p64x0/dev-spi.c

+3 −5

Original line number	Original line	Diff line number	Diff line
	@@ -21,6 +21,7 @@
	#include <mach/regs-clock.h>		#include <mach/regs-clock.h>
	#include <mach/spi-clocks.h>		#include <mach/spi-clocks.h>

			#include <plat/cpu.h>
	#include <plat/s3c64xx-spi.h>		#include <plat/s3c64xx-spi.h>
	#include <plat/gpio-cfg.h>		#include <plat/gpio-cfg.h>

	@@ -185,11 +186,8 @@ struct platform_device s5p64x0_device_spi1 = {

	void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)		void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
	{		{
	unsigned int id;
	struct s3c64xx_spi_info *pd;		struct s3c64xx_spi_info *pd;

	id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;

	/* Reject invalid configuration */		/* Reject invalid configuration */
	if (!num_cs \|\| src_clk_nr < 0		if (!num_cs \|\| src_clk_nr < 0
	\|\| src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {		\|\| src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
	@@ -199,7 +197,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)

	switch (cntrlr) {		switch (cntrlr) {
	case 0:		case 0:
	if (id == 0x50000)		if (soc_is_s5p6450())
	pd = &s5p6450_spi0_pdata;		pd = &s5p6450_spi0_pdata;
	else		else
	pd = &s5p6440_spi0_pdata;		pd = &s5p6440_spi0_pdata;
	@@ -207,7 +205,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
	s5p64x0_device_spi0.dev.platform_data = pd;		s5p64x0_device_spi0.dev.platform_data = pd;
	break;		break;
	case 1:		case 1:
	if (id == 0x50000)		if (soc_is_s5p6450())
	pd = &s5p6450_spi1_pdata;		pd = &s5p6450_spi1_pdata;
	else		else
	pd = &s5p6440_spi1_pdata;		pd = &s5p6440_spi1_pdata;