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Commit be44f30e authored by Taniya Das's avatar Taniya Das
Browse files

ARM: dts: msm: Update the register base and size for SDX20 



The register size for apcs is not as per the register map, update
the size to map the apcs pll region.

Change-Id: I70a33e61d05aba3de7eb4c4f55982bbda3829623
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 827c6ada

arch/arm/boot/dts/qcom/sdx20.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -131,6 +131,9 @@ 


&clock_gcc {

	compatible = "qcom,gcc-sdx20";

	reg = <0x1800000 0x80000>,

		<0xb008018 0x44>;

	reg-names = "cc_base", "apcs_base";

};



&clock_cpu  {