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Commit bde435a9 authored by Kevin Wells's avatar Kevin Wells Committed by Grant Likely
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spi/pl022: Add spi->mode support to AMBA SPI driver



This patch adds spi->mode support for the AMBA pl022 driver and
allows spidev to correctly alter SPI modes. Unused fields used in
the pl022 header file for the pl022_config_chip have been removed.

The ab8500 client driver selects the data transfer size instead
of the platform data.

For platforms that use the amba pl022 driver, the unused fields
in the controller data structure have been removed and the .mode
field in the SPI board info structure is used instead.

Signed-off-by: default avatarKevin Wells <wellsk40@gmail.com>
Tested-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
Acked-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent fadcf49b
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+1 −6
Original line number Diff line number Diff line
@@ -172,18 +172,12 @@ static void phy3250_spi_cs_set(u32 control)
}

static struct pl022_config_chip spi0_chip_info = {
	.lbm			= LOOPBACK_DISABLED,
	.com_mode		= INTERRUPT_TRANSFER,
	.iface			= SSP_INTERFACE_MOTOROLA_SPI,
	.hierarchy		= SSP_MASTER,
	.slave_tx_disable	= 0,
	.endian_tx		= SSP_TX_LSB,
	.endian_rx		= SSP_RX_LSB,
	.data_size		= SSP_DATA_BITS_8,
	.rx_lev_trig		= SSP_RX_4_OR_MORE_ELEM,
	.tx_lev_trig		= SSP_TX_4_OR_MORE_EMPTY_LOC,
	.clk_phase		= SSP_CLK_FIRST_EDGE,
	.clk_pol		= SSP_CLK_POL_IDLE_LOW,
	.ctrl_len		= SSP_BITS_8,
	.wait_state		= SSP_MWIRE_WAIT_ZERO,
	.duplex			= SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
@@ -239,6 +233,7 @@ static int __init phy3250_spi_board_register(void)
			.max_speed_hz = 5000000,
			.bus_num = 0,
			.chip_select = 0,
			.mode = SPI_MODE_0,
			.platform_data = &eeprom,
			.controller_data = &spi0_chip_info,
		},
+2 −3
Original line number Diff line number Diff line
@@ -46,7 +46,6 @@ static ssize_t dummy_looptest(struct device *dev,
	 * struct, this is just used here to alter the behaviour of the chip
	 * in order to perform tests.
	 */
	struct pl022_config_chip *chip_info = spi->controller_data;
	int status;
	u8 txbuf[14] = {0xDE, 0xAD, 0xBE, 0xEF, 0x2B, 0xAD,
			0xCA, 0xFE, 0xBA, 0xBE, 0xB1, 0x05,
@@ -72,7 +71,7 @@ static ssize_t dummy_looptest(struct device *dev,
	 * Force chip to 8 bit mode
	 * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC!
	 */
	chip_info->data_size = SSP_DATA_BITS_8;
	spi->bits_per_word = 8;
	/* You should NOT DO THIS EITHER */
	spi->master->setup(spi);

@@ -159,7 +158,7 @@ static ssize_t dummy_looptest(struct device *dev,
	 * Force chip to 16 bit mode
	 * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC!
	 */
	chip_info->data_size = SSP_DATA_BITS_16;
	spi->bits_per_word = 16;
	/* You should NOT DO THIS EITHER */
	spi->master->setup(spi);

+1 −9
Original line number Diff line number Diff line
@@ -30,8 +30,6 @@ static void select_dummy_chip(u32 chipselect)
}

struct pl022_config_chip dummy_chip_info = {
	/* Nominally this is LOOPBACK_DISABLED, but this is our dummy chip! */
	.lbm = LOOPBACK_ENABLED,
	/*
	 * available POLLING_TRANSFER and INTERRUPT_TRANSFER,
	 * DMA_TRANSFER does not work
@@ -42,14 +40,8 @@ struct pl022_config_chip dummy_chip_info = {
	.hierarchy = SSP_MASTER,
	/* 0 = drive TX even as slave, 1 = do not drive TX as slave */
	.slave_tx_disable = 0,
	/* LSB first */
	.endian_tx = SSP_TX_LSB,
	.endian_rx = SSP_RX_LSB,
	.data_size = SSP_DATA_BITS_8, /* used to be 12 in some default */
	.rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
	.tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
	.clk_phase = SSP_CLK_SECOND_EDGE,
	.clk_pol = SSP_CLK_POL_IDLE_LOW,
	.ctrl_len = SSP_BITS_12,
	.wait_state = SSP_MWIRE_WAIT_ZERO,
	.duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
@@ -75,7 +67,7 @@ static struct spi_board_info u300_spi_devices[] = {
		.bus_num        = 0, /* Only one bus on this chip */
		.chip_select    = 0,
		/* Means SPI_CS_HIGH, change if e.g low CS */
		.mode           = 0,
		.mode           = SPI_MODE_1 | SPI_LSB_FIRST | SPI_LOOP,
	},
#endif
};
+1 −7
Original line number Diff line number Diff line
@@ -55,19 +55,13 @@ static void ab4500_spi_cs_control(u32 command)
}

struct pl022_config_chip ab4500_chip_info = {
	.lbm = LOOPBACK_DISABLED,
	.com_mode = INTERRUPT_TRANSFER,
	.iface = SSP_INTERFACE_MOTOROLA_SPI,
	/* we can act as master only */
	.hierarchy = SSP_MASTER,
	.slave_tx_disable = 0,
	.endian_rx = SSP_RX_MSB,
	.endian_tx = SSP_TX_MSB,
	.data_size = SSP_DATA_BITS_24,
	.rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
	.tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
	.clk_phase = SSP_CLK_SECOND_EDGE,
	.clk_pol = SSP_CLK_POL_IDLE_HIGH,
	.cs_control = ab4500_spi_cs_control,
};

@@ -83,7 +77,7 @@ static struct spi_board_info u8500_spi_devices[] = {
		.max_speed_hz = 12000000,
		.bus_num = 0,
		.chip_select = 0,
		.mode = SPI_MODE_0,
		.mode = SPI_MODE_3,
		.irq = IRQ_DB8500_AB8500,
	},
};
+5 −0
Original line number Diff line number Diff line
@@ -83,6 +83,11 @@ static int __devinit ab8500_spi_probe(struct spi_device *spi)
	struct ab8500 *ab8500;
	int ret;

	spi->bits_per_word = 24;
	ret = spi_setup(spi);
	if (ret < 0)
		return ret;

	ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL);
	if (!ab8500)
		return -ENOMEM;
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