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Commit bcee607f authored by Rodrigo Vivi's avatar Rodrigo Vivi Committed by Greg Kroah-Hartman
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drm/i915: BDW Fix Halo PCI IDs marked as ULT. 

commit 6b96d705f3cf435b0b8835b12c9742513c77fed6 upstream.

BDW with PCI-IDs ended in "2" aren't ULT, but HALO.
Let's fix it and at least allow VGA to work on this units.

v2: forgot ammend and v1 doesn't compile

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87220


Cc: Xion Zhang <xiong.y.zhang@intel.com>
Cc: Guo Jinxian <jinxianx.guo@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 817697b8

drivers/gpu/drm/i915/i915_drv.h

+1 −2
Original line number Diff line number Diff line
@@ -2076,8 +2076,7 @@ struct drm_i915_cmd_table { 
#define IS_HSW_EARLY_SDV(dev)	(IS_HASWELL(dev) && \

				 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)

#define IS_BDW_ULT(dev)		(IS_BROADWELL(dev) && \

				 ((INTEL_DEVID(dev) & 0xf) == 0x2  || \

				 (INTEL_DEVID(dev) & 0xf) == 0x6 || \

				 ((INTEL_DEVID(dev) & 0xf) == 0x6 ||	\

				 (INTEL_DEVID(dev) & 0xf) == 0xe))

#define IS_HSW_ULT(dev)		(IS_HASWELL(dev) && \

				 (INTEL_DEVID(dev) & 0xFF00) == 0x0A00)