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Commit bbe8f0ee authored by Alex Shi's avatar Alex Shi
Browse files

Merge tag 'v3.18.36' into linux-linaro-lsk-v3.18 

 This is the 3.18.36 stable release
parents 1beb6ea3 d420f00c

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 3

PATCHLEVEL = 18

SUBLEVEL = 35

SUBLEVEL = 36

EXTRAVERSION =

NAME = Diseased Newt

arch/arm/kernel/ptrace.c

+1 −1
Original line number Diff line number Diff line
@@ -733,8 +733,8 @@ static int vfp_set(struct task_struct *target, 
	if (ret)

		return ret;



	vfp_flush_hwstate(thread);

	thread->vfpstate.hard = new_vfp;

	vfp_flush_hwstate(thread);



	return 0;

}

arch/parisc/kernel/unaligned.c

+9 −1
Original line number Diff line number Diff line
@@ -666,7 +666,7 @@ void handle_unaligned(struct pt_regs *regs) 
		break;

	}



	if (modify && R1(regs->iir))

	if (ret == 0 && modify && R1(regs->iir))

		regs->gr[R1(regs->iir)] = newbase;
@@ -677,6 +677,14 @@ void handle_unaligned(struct pt_regs *regs) 


	if (ret)

	{

		/*

		 * The unaligned handler failed.

		 * If we were called by __get_user() or __put_user() jump

		 * to it's exception fixup handler instead of crashing.

		 */

		if (!user_mode(regs) && fixup_exception(regs))

			return;



		printk(KERN_CRIT "Unaligned handler failed, ret = %d\n", ret);

		die_if_kernel("Unaligned data reference", regs, 28);

arch/powerpc/include/asm/reg.h

+3 −3
Original line number Diff line number Diff line
@@ -703,7 +703,7 @@ 
#define   MMCR0_FCWAIT	0x00000002UL /* freeze counter in WAIT state */

#define   MMCR0_FCHV	0x00000001UL /* freeze conditions in hypervisor mode */

#define SPRN_MMCR1	798

#define SPRN_MMCR2	769

#define SPRN_MMCR2	785

#define SPRN_MMCRA	0x312

#define   MMCRA_SDSYNC	0x80000000UL /* SDAR synced with SIAR */

#define   MMCRA_SDAR_DCACHE_MISS 0x40000000UL
@@ -739,13 +739,13 @@ 
#define SPRN_PMC6	792

#define SPRN_PMC7	793

#define SPRN_PMC8	794

#define SPRN_SIAR	780

#define SPRN_SDAR	781

#define SPRN_SIER	784

#define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */

#define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */

#define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */

#define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */

#define SPRN_SIAR	796

#define SPRN_SDAR	797

#define SPRN_TACR	888

#define SPRN_TCSCR	889

#define SPRN_CSIGR	890

arch/powerpc/platforms/pseries/eeh_pseries.c

+36 −15
Original line number Diff line number Diff line
@@ -642,12 +642,15 @@ static int pseries_eeh_configure_bridge(struct eeh_pe *pe) 
{

	int config_addr;

	int ret;

	/* Waiting 0.2s maximum before skipping configuration */

	int max_wait = 200;



	/* Figure out the PE address */

	config_addr = pe->config_addr;

	if (pe->addr)

		config_addr = pe->addr;



	while (max_wait > 0) {

		/* Use new configure-pe function, if supported */

		if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {

			ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
@@ -661,10 +664,28 @@ static int pseries_eeh_configure_bridge(struct eeh_pe *pe) 
			return -EFAULT;

		}



	if (ret)

		if (!ret)

			return ret;



		/*

		 * If RTAS returns a delay value that's above 100ms, cut it

		 * down to 100ms in case firmware made a mistake.  For more

		 * on how these delay values work see rtas_busy_delay_time

		 */

		if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&

		    ret <= RTAS_EXTENDED_DELAY_MAX)

			ret = RTAS_EXTENDED_DELAY_MIN+2;



		max_wait -= rtas_busy_delay_time(ret);



		if (max_wait < 0)

			break;



		rtas_busy_delay(ret);

	}



	pr_warn("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",

		__func__, pe->phb->global_number, pe->addr, ret);



	return ret;

}