Loading drivers/usb/host/xhci.c +1 −3 Original line number Diff line number Diff line Loading @@ -35,8 +35,6 @@ #define DRIVER_AUTHOR "Sarah Sharp" #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver" #define XHCI_INT_MODERATION_VAL 4000 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E) /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */ Loading Loading @@ -644,7 +642,7 @@ int xhci_run(struct usb_hcd *hcd) "// Set the interrupt modulation register"); temp = readl(&xhci->ir_set->irq_control); temp &= ~ER_IRQ_INTERVAL_MASK; temp |= (u32) XHCI_INT_MODERATION_VAL; temp |= (u32) 160; writel(temp, &xhci->ir_set->irq_control); /* Set the HCD state before we enable the irqs */ Loading Loading
drivers/usb/host/xhci.c +1 −3 Original line number Diff line number Diff line Loading @@ -35,8 +35,6 @@ #define DRIVER_AUTHOR "Sarah Sharp" #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver" #define XHCI_INT_MODERATION_VAL 4000 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E) /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */ Loading Loading @@ -644,7 +642,7 @@ int xhci_run(struct usb_hcd *hcd) "// Set the interrupt modulation register"); temp = readl(&xhci->ir_set->irq_control); temp &= ~ER_IRQ_INTERVAL_MASK; temp |= (u32) XHCI_INT_MODERATION_VAL; temp |= (u32) 160; writel(temp, &xhci->ir_set->irq_control); /* Set the HCD state before we enable the irqs */ Loading