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Commit bb85fbb6 authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
Browse files

tg3: Tune 5785 clock switching 



This patch tunes the timeouts the CPMU uses to decide when to switch
from the clocks output by the PHY to internal clock sources.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Reviewed-by: default avatarMichael Chan <mchan@broadcom.com>
Reviewed-by: default avatarBenjamin Li <benli@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5e7ccf20

drivers/net/tg3.c

+10 −5
Original line number Diff line number Diff line
@@ -917,7 +917,9 @@ static void tg3_mdio_config_5785(struct tg3 *tp) 
		tw32(MAC_PHYCFG2, val);



		val = tr32(MAC_PHYCFG1);

		val &= ~MAC_PHYCFG1_RGMII_INT;

		val &= ~(MAC_PHYCFG1_RGMII_INT |

			 MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK);

		val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT;

		tw32(MAC_PHYCFG1, val);



		return;
@@ -933,15 +935,18 @@ static void tg3_mdio_config_5785(struct tg3 *tp) 


	tw32(MAC_PHYCFG2, val);



	val = tr32(MAC_PHYCFG1) & ~(MAC_PHYCFG1_RGMII_EXT_RX_DEC |

				    MAC_PHYCFG1_RGMII_SND_STAT_EN);

	if (tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE) {

	val = tr32(MAC_PHYCFG1);

	val &= ~(MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK |

		 MAC_PHYCFG1_RGMII_EXT_RX_DEC | MAC_PHYCFG1_RGMII_SND_STAT_EN);

	if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)) {

		if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)

			val |= MAC_PHYCFG1_RGMII_EXT_RX_DEC;

		if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_TX_EN)

			val |= MAC_PHYCFG1_RGMII_SND_STAT_EN;

	}

	tw32(MAC_PHYCFG1, val | MAC_PHYCFG1_RGMII_INT | MAC_PHYCFG1_TXC_DRV);

	val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT |

	       MAC_PHYCFG1_RGMII_INT | MAC_PHYCFG1_TXC_DRV;

	tw32(MAC_PHYCFG1, val);



	val = tr32(MAC_EXT_RGMII_MODE);

	val &= ~(MAC_RGMII_MODE_RX_INT_B |

drivers/net/tg3.h

+4 −0
Original line number Diff line number Diff line
@@ -524,6 +524,10 @@ 
/* 0x598 --> 0x5a0 unused */

#define MAC_PHYCFG1			0x000005a0

#define  MAC_PHYCFG1_RGMII_INT		 0x00000001

#define  MAC_PHYCFG1_RXCLK_TO_MASK	 0x00001ff0

#define  MAC_PHYCFG1_RXCLK_TIMEOUT	 0x00001000

#define  MAC_PHYCFG1_TXCLK_TO_MASK	 0x01ff0000

#define  MAC_PHYCFG1_TXCLK_TIMEOUT	 0x01000000

#define  MAC_PHYCFG1_RGMII_EXT_RX_DEC	 0x02000000

#define  MAC_PHYCFG1_RGMII_SND_STAT_EN	 0x04000000

#define  MAC_PHYCFG1_TXC_DRV		 0x20000000