Merge "ARM: dts: msm: Configure BLSP2 UART0 instance for MSM8953" (bb6ccac0) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/msm8953-pinctrl.dtsi

+27 −1

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
		* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -508,6 +508,32 @@
		};
		};

		blsp2_uart0_active: blsp2_uart0_active {
		mux {
		pins = "gpio16", "gpio17", "gpio18", "gpio19";
		function = "blsp_uart5";
		};

		config {
		pins = "gpio16", "gpio17", "gpio18", "gpio19";
		drive-strength = <16>;
		bias-disable;
		};
		};

		blsp2_uart0_sleep: blsp2_uart0_sleep {
		mux {
		pins = "gpio16", "gpio17", "gpio18", "gpio19";
		function = "gpio";
		};

		config {
		pins = "gpio16", "gpio17", "gpio18", "gpio19";
		drive-strength = <2>;
		bias-disable;
		};
		};

		/* SDC pin type */
		sdc1_clk_on: sdc1_clk_on {
		config {

+36 −0

Original line number	Diff line number	Diff line
		@@ -665,6 +665,42 @@
		status = "disabled";
		};

		blsp2_uart0: uart@7aef000 {
		compatible = "qcom,msm-hsuart-v14";
		reg = <0x7aef000 0x200>,
		<0x7ac4000 0x1f000>;
		reg-names = "core_mem", "bam_mem";

		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
		#address-cells = <0>;
		interrupt-parent = <&blsp2_uart0>;
		interrupts = <0 1 2>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0xffffffff>;
		interrupt-map = <0 &intc 0 306 0
		1 &intc 0 239 0
		2 &tlmm 17 0>;

		qcom,inject-rx-on-wakeup;
		qcom,rx-char-to-inject = <0xFD>;
		qcom,master-id = <84>;
		clock-names = "core_clk", "iface_clk";
		clocks = <&clock_gcc clk_gcc_blsp2_uart1_apps_clk>,
		<&clock_gcc clk_gcc_blsp2_ahb_clk>;
		pinctrl-names = "sleep", "default";
		pinctrl-0 = <&blsp2_uart0_sleep>;
		pinctrl-1 = <&blsp2_uart0_active>;
		qcom,bam-tx-ep-pipe-index = <0>;
		qcom,bam-rx-ep-pipe-index = <1>;
		qcom,msm-bus,name = "blsp2_uart0";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
		<84 512 0 0>,
		<84 512 500 800>;
		status = "disabled";
		};

		dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
		#dma-cells = <4>;
		compatible = "qcom,sps-dma";