Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit bb3e9efd authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Configure SPI node for mdmfermium"

parents c31b4b50 9eab4b09

arch/arm/boot/dts/qcom/mdmfermium-pinctrl.dtsi

+64 −0
Original line number Diff line number Diff line
@@ -32,5 +32,69 @@ 
				bias-pull-down;

			};

		};



		spi1 {



			spi1_default: spi1_default {

				/* active state */

				mux {

					/* MOSI, MISO, CLK */

					pins = "gpio4", "gpio5", "gpio7";

					function = "blsp_spi2";

				};



				config {

					pins = "gpio4", "gpio5", "gpio7";

					drive-strength = <12>; /* 12 MA */

					bias-disable = <0>; /* No PULL */

				};

			};





			spi1_sleep: spi1_sleep {

				/* suspended state */

				mux {

					/* MOSI, MISO, CLK */

					pins = "gpio4", "gpio5", "gpio7";

					function = "gpio";

				};



				config {

					pins = "gpio4", "gpio5", "gpio7";

					drive-strength = <2>; /* 2 MA */

					bias-pull-down; /* PULL Down */

				};

			};



			spi1_cs0_active: cs0_active {

				/* CS */

				mux {

					pins = "gpio6";

					function = "blsp_spi2";

				};



				config {

					pins = "gpio6";

					drive-strength = <2>;

					bias-disable = <0>;

				};

			};



			spi1_cs0_sleep: cs0_sleep {

				/* CS */

				mux {

					pins = "gpio6";

					function = "gpio";

				};



				config {

					pins = "gpio6";

					drive-strength = <2>;

					bias-disable = <0>;

				};

			};

		};





	};

};

arch/arm/boot/dts/qcom/mdmfermium.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -58,6 +58,8 @@ 
		smd11 = &smdtty_data11;

		smd21 = &smdtty_data21;

		smd36 = &smdtty_loopback;

		/* spi device */

		spi1  = &spi_1;

	};



	cpus {
@@ -500,6 +502,33 @@ 
		cell-index = <0>;

		status = "disabled";

	};



	spi_1: spi@78b6000 { /* BLSP1 QUP1 */

		compatible = "qcom,spi-qup-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "spi_physical", "spi_bam_physical";

		reg = <0x78b6000 0x600>,

		      <0x7884000 0x2b000>;

		interrupt-names = "spi_irq", "spi_bam_irq";

		interrupts = <0 96 0>, <0 238 0>;

		spi-max-frequency = <19200000>;

		pinctrl-names = "spi_default", "spi_sleep";

		pinctrl-0 = <&spi1_default &spi1_cs0_active>;

		pinctrl-1 = <&spi1_sleep &spi1_cs0_sleep>;

		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,

			 <&clock_gcc clk_gcc_blsp1_qup2_spi_apps_clk>;

		clock-names = "iface_clk", "core_clk";

		qcom,infinite-mode = <0>;

		qcom,use-bam;

		qcom,use-pinctrl;

		qcom,ver-reg-exists;

		qcom,bam-consumer-pipe-index = <14>;

		qcom,bam-producer-pipe-index = <15>;

		qcom,master-id = <86>;

		status = "disabled";

	};



};



#include "mdmfermium-regulator.dtsi"