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Commit ba01dfe1 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'for-davem' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next 



John W. Linville says:

====================
This is another batch of updates intended for the 3.7 stream.

There are not a lot of large items, but iwlwifi, mwifiex, rt2x00,
ath9k, and brcmfmac all get some attention.  Wei Yongjun also provides
a series of small maintenance fixes.

This also includes a pull of the wireless tree in order to satisfy
some prerequisites for later patches.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e9756398 9316f0e3

drivers/bcma/main.c

+10 −0
Original line number Diff line number Diff line
@@ -227,7 +227,17 @@ int __devinit bcma_bus_register(struct bcma_bus *bus) 


void bcma_bus_unregister(struct bcma_bus *bus)

{

	struct bcma_device *cores[3];



	cores[0] = bcma_find_core(bus, BCMA_CORE_MIPS_74K);

	cores[1] = bcma_find_core(bus, BCMA_CORE_PCIE);

	cores[2] = bcma_find_core(bus, BCMA_CORE_4706_MAC_GBIT_COMMON);



	bcma_unregister_cores(bus);



	kfree(cores[2]);

	kfree(cores[1]);

	kfree(cores[0]);

}



int __init bcma_bus_early_register(struct bcma_bus *bus,

drivers/net/wireless/airo.c

+2 −5
Original line number Diff line number Diff line
@@ -87,7 +87,6 @@ static struct pci_driver airo_driver = { 
/* Include Wireless Extension definition and check version - Jean II */

#include <linux/wireless.h>

#define WIRELESS_SPY		/* enable iwspy support */

#include <net/iw_handler.h>	/* New driver API */



#define CISCO_EXT		/* enable Cisco extensions */

#ifdef CISCO_EXT
@@ -5984,13 +5983,11 @@ static int airo_set_wap(struct net_device *dev, 
	Cmd cmd;

	Resp rsp;

	APListRid APList_rid;

	static const u8 any[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };

	static const u8 off[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };



	if (awrq->sa_family != ARPHRD_ETHER)

		return -EINVAL;

	else if (!memcmp(any, awrq->sa_data, ETH_ALEN) ||

	         !memcmp(off, awrq->sa_data, ETH_ALEN)) {

	else if (is_broadcast_ether_addr(awrq->sa_data) ||

		 is_zero_ether_addr(awrq->sa_data)) {

		memset(&cmd, 0, sizeof(cmd));

		cmd.cmd=CMD_LOSE_SYNC;

		if (down_interruptible(&local->sem))

drivers/net/wireless/at76c50x-usb.c

+12 −42
Original line number Diff line number Diff line
@@ -498,36 +498,6 @@ exit: 
	return ret;

}



#define HEX2STR_BUFFERS 4

#define HEX2STR_MAX_LEN 64



/* Convert binary data into hex string */

static char *hex2str(void *buf, size_t len)

{

	static atomic_t a = ATOMIC_INIT(0);

	static char bufs[HEX2STR_BUFFERS][3 * HEX2STR_MAX_LEN + 1];

	char *ret = bufs[atomic_inc_return(&a) & (HEX2STR_BUFFERS - 1)];

	char *obuf = ret;

	u8 *ibuf = buf;



	if (len > HEX2STR_MAX_LEN)

		len = HEX2STR_MAX_LEN;



	if (len == 0)

		goto exit;



	while (len--) {

		obuf = hex_byte_pack(obuf, *ibuf++);

		*obuf++ = '-';

	}

	obuf--;



exit:

	*obuf = '\0';



	return ret;

}



/* LED trigger */

static int tx_activity;

static void at76_ledtrig_tx_timerfunc(unsigned long data);
@@ -1004,9 +974,9 @@ static void at76_dump_mib_mac_wep(struct at76_priv *priv) 
	    WEP_SMALL_KEY_LEN : WEP_LARGE_KEY_LEN;



	for (i = 0; i < WEP_KEYS; i++)

		at76_dbg(DBG_MIB, "%s: MIB MAC_WEP: key %d: %s",

		at76_dbg(DBG_MIB, "%s: MIB MAC_WEP: key %d: %*phD",

			 wiphy_name(priv->hw->wiphy), i,

			 hex2str(m->wep_default_keyvalue[i], key_len));

			 key_len, m->wep_default_keyvalue[i]);

exit:

	kfree(m);

}
@@ -1031,7 +1001,7 @@ static void at76_dump_mib_mac_mgmt(struct at76_priv *priv) 
	at76_dbg(DBG_MIB, "%s: MIB MAC_MGMT: beacon_period %d CFP_max_duration "

		 "%d medium_occupancy_limit %d station_id 0x%x ATIM_window %d "

		 "CFP_mode %d privacy_opt_impl %d DTIM_period %d CFP_period %d "

		 "current_bssid %pM current_essid %s current_bss_type %d "

		 "current_bssid %pM current_essid %*phD current_bss_type %d "

		 "pm_mode %d ibss_change %d res %d "

		 "multi_domain_capability_implemented %d "

		 "international_roaming %d country_string %.3s",
@@ -1041,7 +1011,7 @@ static void at76_dump_mib_mac_mgmt(struct at76_priv *priv) 
		 le16_to_cpu(m->station_id), le16_to_cpu(m->ATIM_window),

		 m->CFP_mode, m->privacy_option_implemented, m->DTIM_period,

		 m->CFP_period, m->current_bssid,

		 hex2str(m->current_essid, IW_ESSID_MAX_SIZE),

		 IW_ESSID_MAX_SIZE, m->current_essid,

		 m->current_bss_type, m->power_mgmt_mode, m->ibss_change,

		 m->res, m->multi_domain_capability_implemented,

		 m->multi_domain_capability_enabled, m->country_string);
@@ -1069,7 +1039,7 @@ static void at76_dump_mib_mac(struct at76_priv *priv) 
		 "cwmin %d cwmax %d short_retry_time %d long_retry_time %d "

		 "scan_type %d scan_channel %d probe_delay %u "

		 "min_channel_time %d max_channel_time %d listen_int %d "

		 "desired_ssid %s desired_bssid %pM desired_bsstype %d",

		 "desired_ssid %*phD desired_bssid %pM desired_bsstype %d",

		 wiphy_name(priv->hw->wiphy),

		 le32_to_cpu(m->max_tx_msdu_lifetime),

		 le32_to_cpu(m->max_rx_lifetime),
@@ -1080,7 +1050,7 @@ static void at76_dump_mib_mac(struct at76_priv *priv) 
		 le16_to_cpu(m->min_channel_time),

		 le16_to_cpu(m->max_channel_time),

		 le16_to_cpu(m->listen_interval),

		 hex2str(m->desired_ssid, IW_ESSID_MAX_SIZE),

		 IW_ESSID_MAX_SIZE, m->desired_ssid,

		 m->desired_bssid, m->desired_bsstype);

exit:

	kfree(m);
@@ -1160,13 +1130,13 @@ static void at76_dump_mib_mdomain(struct at76_priv *priv) 
		goto exit;

	}



	at76_dbg(DBG_MIB, "%s: MIB MDOMAIN: channel_list %s",

	at76_dbg(DBG_MIB, "%s: MIB MDOMAIN: channel_list %*phD",

		 wiphy_name(priv->hw->wiphy),

		 hex2str(m->channel_list, sizeof(m->channel_list)));

		 (int)sizeof(m->channel_list), m->channel_list);



	at76_dbg(DBG_MIB, "%s: MIB MDOMAIN: tx_powerlevel %s",

	at76_dbg(DBG_MIB, "%s: MIB MDOMAIN: tx_powerlevel %*phD",

		 wiphy_name(priv->hw->wiphy),

		 hex2str(m->tx_powerlevel, sizeof(m->tx_powerlevel)));

		 (int)sizeof(m->tx_powerlevel), m->tx_powerlevel);

exit:

	kfree(m);

}
@@ -1369,9 +1339,9 @@ static int at76_startup_device(struct at76_priv *priv) 
	int ret;



	at76_dbg(DBG_PARAMS,

		 "%s param: ssid %.*s (%s) mode %s ch %d wep %s key %d "

		 "%s param: ssid %.*s (%*phD) mode %s ch %d wep %s key %d "

		 "keylen %d", wiphy_name(priv->hw->wiphy), priv->essid_size,

		 priv->essid, hex2str(priv->essid, IW_ESSID_MAX_SIZE),

		 priv->essid, IW_ESSID_MAX_SIZE, priv->essid,

		 priv->iw_mode == IW_MODE_ADHOC ? "adhoc" : "infra",

		 priv->channel, priv->wep_enabled ? "enabled" : "disabled",

		 priv->wep_key_id, priv->wep_keys_len[priv->wep_key_id]);

drivers/net/wireless/ath/ath9k/ani.c

+1 −1
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel, 
				     entry_cck->fir_step_level);



	/* Skip MRC CCK for pre AR9003 families */

	if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9485(ah))

	if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah))

		return;



	if (aniState->mrcCCK != entry_cck->mrc_cck_on)

drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

+94 −27
Original line number Diff line number Diff line
@@ -138,7 +138,8 @@ static const struct ar9300_eeprom ar9300_default = { 
	 },

	.base_ext1 = {

		.ant_div_control = 0,

		.future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}

		.future = {0, 0, 0},

		.tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}

	},

	.calFreqPier2G = {

		FREQ2FBIN(2412, 1),
@@ -713,7 +714,8 @@ static const struct ar9300_eeprom ar9300_x113 = { 
	 },

	 .base_ext1 = {

		.ant_div_control = 0,

		.future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}

		.future = {0, 0, 0},

		.tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}

	 },

	.calFreqPier2G = {

		FREQ2FBIN(2412, 1),
@@ -1289,7 +1291,8 @@ static const struct ar9300_eeprom ar9300_h112 = { 
	},

	.base_ext1 = {

		.ant_div_control = 0,

		.future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}

		.future = {0, 0, 0},

		.tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}

	},

	.calFreqPier2G = {

		FREQ2FBIN(2412, 1),
@@ -1865,7 +1868,8 @@ static const struct ar9300_eeprom ar9300_x112 = { 
	},

	.base_ext1 = {

		.ant_div_control = 0,

		.future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}

		.future = {0, 0, 0},

		.tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}

	},

	.calFreqPier2G = {

		FREQ2FBIN(2412, 1),
@@ -2440,7 +2444,8 @@ static const struct ar9300_eeprom ar9300_h116 = { 
	 },

	 .base_ext1 = {

		.ant_div_control = 0,

		.future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}

		.future = {0, 0, 0},

		.tempslopextension = {0, 0, 0, 0, 0, 0, 0, 0}

	 },

	.calFreqPier2G = {

		FREQ2FBIN(2412, 1),
@@ -3520,7 +3525,7 @@ static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz) 


	if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))

		REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);

	else if (AR_SREV_9462(ah) || AR_SREV_9550(ah))

	else if (AR_SREV_9462(ah) || AR_SREV_9550(ah) || AR_SREV_9565(ah))

		REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);

	else {

		REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
@@ -3568,7 +3573,7 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) 


	u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);



	if (AR_SREV_9462(ah)) {

	if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {

		REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,

				AR_SWITCH_TABLE_COM_AR9462_ALL, value);

	} else if (AR_SREV_9550(ah)) {
@@ -3612,7 +3617,7 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) 
		}

	}



	if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {

	if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) {

		value = ath9k_hw_ar9300_get_eeprom(ah, EEP_ANT_DIV_CTL1);

		/*

		 * main_lnaconf, alt_lnaconf, main_tb, alt_tb
@@ -3622,19 +3627,16 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) 
		regval &= (~AR_ANT_DIV_CTRL_ALL);

		regval |= (value & 0x3f) << AR_ANT_DIV_CTRL_ALL_S;

		/* enable_lnadiv */

		regval &= (~AR_PHY_9485_ANT_DIV_LNADIV);

		regval |= ((value >> 6) & 0x1) <<

				AR_PHY_9485_ANT_DIV_LNADIV_S;

		regval &= (~AR_PHY_ANT_DIV_LNADIV);

		regval |= ((value >> 6) & 0x1) << AR_PHY_ANT_DIV_LNADIV_S;

		REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);



		/*enable fast_div */

		regval = REG_READ(ah, AR_PHY_CCK_DETECT);

		regval &= (~AR_FAST_DIV_ENABLE);

		regval |= ((value >> 7) & 0x1) <<

				AR_FAST_DIV_ENABLE_S;

		regval |= ((value >> 7) & 0x1) << AR_FAST_DIV_ENABLE_S;

		REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);

		ant_div_ctl1 =

			ah->eep_ops->get_eeprom(ah, EEP_ANT_DIV_CTL1);

		ant_div_ctl1 = ah->eep_ops->get_eeprom(ah, EEP_ANT_DIV_CTL1);

		/* check whether antenna diversity is enabled */

		if ((ant_div_ctl1 >> 0x6) == 0x3) {

			regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
@@ -3642,15 +3644,15 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) 
			 * clear bits 25-30 main_lnaconf, alt_lnaconf,

			 * main_tb, alt_tb

			 */

			regval &= (~(AR_PHY_9485_ANT_DIV_MAIN_LNACONF |

					AR_PHY_9485_ANT_DIV_ALT_LNACONF |

					AR_PHY_9485_ANT_DIV_ALT_GAINTB |

					AR_PHY_9485_ANT_DIV_MAIN_GAINTB));

			regval &= (~(AR_PHY_ANT_DIV_MAIN_LNACONF |

				     AR_PHY_ANT_DIV_ALT_LNACONF |

				     AR_PHY_ANT_DIV_ALT_GAINTB |

				     AR_PHY_ANT_DIV_MAIN_GAINTB));

			/* by default use LNA1 for the main antenna */

			regval |= (AR_PHY_9485_ANT_DIV_LNA1 <<

					AR_PHY_9485_ANT_DIV_MAIN_LNACONF_S);

			regval |= (AR_PHY_9485_ANT_DIV_LNA2 <<

					AR_PHY_9485_ANT_DIV_ALT_LNACONF_S);

			regval |= (AR_PHY_ANT_DIV_LNA1 <<

				   AR_PHY_ANT_DIV_MAIN_LNACONF_S);

			regval |= (AR_PHY_ANT_DIV_LNA2 <<

				   AR_PHY_ANT_DIV_ALT_LNACONF_S);

			REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);

		}
@@ -3843,7 +3845,7 @@ void ar9003_hw_internal_regulator_apply(struct ath_hw *ah) 
			REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set);

			if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))

				return;

		} else if (AR_SREV_9462(ah)) {

		} else if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {

			reg_val = le32_to_cpu(pBase->swreg);

			REG_WRITE(ah, AR_PHY_PMU1, reg_val);

		} else {
@@ -3874,7 +3876,7 @@ void ar9003_hw_internal_regulator_apply(struct ath_hw *ah) 
			while (!REG_READ_FIELD(ah, AR_PHY_PMU2,

						AR_PHY_PMU2_PGM))

				udelay(10);

		} else if (AR_SREV_9462(ah))

		} else if (AR_SREV_9462(ah) || AR_SREV_9565(ah))

			REG_RMW_FIELD(ah, AR_PHY_PMU1, AR_PHY_PMU1_PWD, 0x1);

		else {

			reg_val = REG_READ(ah, AR_RTC_SLEEP_CLK) |
@@ -3977,6 +3979,62 @@ static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz) 
		      bias & 0x3);

}



static int ar9003_hw_get_thermometer(struct ath_hw *ah)

{

	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;

	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;

	int thermometer =  (pBase->miscConfiguration >> 1) & 0x3;



	return --thermometer;

}



static void ar9003_hw_thermometer_apply(struct ath_hw *ah)

{

	int thermometer = ar9003_hw_get_thermometer(ah);

	u8 therm_on = (thermometer < 0) ? 0 : 1;



	REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4,

		      AR_PHY_65NM_CH0_RXTX4_THERM_ON_OVR, therm_on);

	if (ah->caps.tx_chainmask & BIT(1))

		REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4,

			      AR_PHY_65NM_CH0_RXTX4_THERM_ON_OVR, therm_on);

	if (ah->caps.tx_chainmask & BIT(2))

		REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4,

			      AR_PHY_65NM_CH0_RXTX4_THERM_ON_OVR, therm_on);



	therm_on = (thermometer < 0) ? 0 : (thermometer == 0);

	REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4,

		      AR_PHY_65NM_CH0_RXTX4_THERM_ON, therm_on);

	if (ah->caps.tx_chainmask & BIT(1)) {

		therm_on = (thermometer < 0) ? 0 : (thermometer == 1);

		REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4,

			      AR_PHY_65NM_CH0_RXTX4_THERM_ON, therm_on);

	}

	if (ah->caps.tx_chainmask & BIT(2)) {

		therm_on = (thermometer < 0) ? 0 : (thermometer == 2);

		REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4,

			      AR_PHY_65NM_CH0_RXTX4_THERM_ON, therm_on);

	}

}



static void ar9003_hw_thermo_cal_apply(struct ath_hw *ah)

{

	u32 data, ko, kg;



	if (!AR_SREV_9462_20(ah))

		return;

	ar9300_otp_read_word(ah, 1, &data);

	ko = data & 0xff;

	kg = (data >> 8) & 0xff;

	if (ko || kg) {

		REG_RMW_FIELD(ah, AR_PHY_BB_THERM_ADC_3,

			      AR_PHY_BB_THERM_ADC_3_THERM_ADC_OFFSET, ko);

		REG_RMW_FIELD(ah, AR_PHY_BB_THERM_ADC_3,

			      AR_PHY_BB_THERM_ADC_3_THERM_ADC_SCALE_GAIN,

			      kg + 256);

	}

}



static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,

					     struct ath9k_channel *chan)

{
@@ -3992,6 +4050,8 @@ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah, 
		ar9003_hw_internal_regulator_apply(ah);

	ar9003_hw_apply_tuning_caps(ah);

	ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);

	ar9003_hw_thermometer_apply(ah);

	ar9003_hw_thermo_cal_apply(ah);

}



static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
@@ -4528,7 +4588,7 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah, 
{

	int tempSlope = 0;

	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;

	int f[3], t[3];

	int f[8], t[8], i;



	REG_RMW(ah, AR_PHY_TPC_11_B0,

		(correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
@@ -4561,7 +4621,14 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah, 
	 */

	if (frequency < 4000)

		tempSlope = eep->modalHeader2G.tempSlope;

	else if (eep->base_ext2.tempSlopeLow != 0) {

	else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {

		for (i = 0; i < 8; i++) {

			t[i] = eep->base_ext1.tempslopextension[i];

			f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);

		}

		tempSlope = ar9003_hw_power_interpolate((s32) frequency,

							f, t, 8);

	} else if (eep->base_ext2.tempSlopeLow != 0) {

		t[0] = eep->base_ext2.tempSlopeLow;

		f[0] = 5180;

		t[1] = eep->modalHeader5G.tempSlope;