Commit b98ac702 authored Feb 04, 2009 by Andy Fleming Committed by David S. Miller Feb 04, 2009

gianfar: Fix potential soft reset race



SOFT_RESET must be asserted for at least 3 TX clocks in order for it to work
properly.  The syncs in the gfar_write() commands have been hiding this, but
we need to guarantee it.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent 1fbe4932

drivers/net/gianfar.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -351,6 +351,9 @@ static int gfar_probe(struct of_device *ofdev,
		/* Reset MAC layer */
		gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);

		/* We need to delay at least 3 TX clocks */
		udelay(2);

		tempval = (MACCFG1_TX_FLOW \| MACCFG1_RX_FLOW);
		gfar_write(&priv->regs->maccfg1, tempval);