Loading arch/arm64/Kconfig +14 −0 Original line number Diff line number Diff line Loading @@ -376,6 +376,20 @@ config ARCH_WANT_HUGE_PMD_SHARE config HAVE_ARCH_TRANSPARENT_HUGEPAGE def_bool y config ARMV7_COMPAT_CP15_BARRIER bool "Allow applications to use the CP15 barrier operations" depends on ARMV7_COMPAT default y help This option allows applications to use deprecated CP15 barrier instructions. This is useful because this was the only way to create a barrier on older ARM processors. If you want to execute ARMv7 applications, say Y config ARCH_HAS_CACHE_LINE_SIZE def_bool y source "mm/Kconfig" config XEN_DOM0 Loading arch/arm64/mm/proc.S +1 −1 Original line number Diff line number Diff line Loading @@ -243,7 +243,7 @@ ENTRY(__cpu_setup) ret // return to head.S ENDPROC(__cpu_setup) #ifdef CONFIG_ARMV7_COMPAT #ifdef CONFIG_ARMV7_COMPAT_CP15_BARRIER /* * n n T * U E WT T UD US IHBS Loading Loading
arch/arm64/Kconfig +14 −0 Original line number Diff line number Diff line Loading @@ -376,6 +376,20 @@ config ARCH_WANT_HUGE_PMD_SHARE config HAVE_ARCH_TRANSPARENT_HUGEPAGE def_bool y config ARMV7_COMPAT_CP15_BARRIER bool "Allow applications to use the CP15 barrier operations" depends on ARMV7_COMPAT default y help This option allows applications to use deprecated CP15 barrier instructions. This is useful because this was the only way to create a barrier on older ARM processors. If you want to execute ARMv7 applications, say Y config ARCH_HAS_CACHE_LINE_SIZE def_bool y source "mm/Kconfig" config XEN_DOM0 Loading
arch/arm64/mm/proc.S +1 −1 Original line number Diff line number Diff line Loading @@ -243,7 +243,7 @@ ENTRY(__cpu_setup) ret // return to head.S ENDPROC(__cpu_setup) #ifdef CONFIG_ARMV7_COMPAT #ifdef CONFIG_ARMV7_COMPAT_CP15_BARRIER /* * n n T * U E WT T UD US IHBS Loading