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Commit b8978784 authored by Ben Dooks's avatar Ben Dooks Committed by Linus Torvalds
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spi_s3c24xx: fix clock rate calculation



Currently the clock rate calculation may round as pleased, which means
that it is possible that we will round down and end up with a faster clock
rate than intended.

Change the calculation to use DIV_ROUND_UP() to ensure that we end up with
a clock rate either the same as or lower than the user requested one.

Signed-off-by: default avatarBen Dooks <ben@simtec.co.uk>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent b2503a94
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+7 −10
Original line number Diff line number Diff line
@@ -111,6 +111,7 @@ static int s3c24xx_spi_setupxfer(struct spi_device *spi,
	unsigned int bpw;
	unsigned int hz;
	unsigned int div;
	unsigned long clk;

	bpw = t ? t->bits_per_word : spi->bits_per_word;
	hz  = t ? t->speed_hz : spi->max_speed_hz;
@@ -120,20 +121,16 @@ static int s3c24xx_spi_setupxfer(struct spi_device *spi,
		return -EINVAL;
	}

	div = clk_get_rate(hw->clk) / hz;

	/* is clk = pclk / (2 * (pre+1)), or is it
	 *    clk = (pclk * 2) / ( pre + 1) */

	div /= 2;

	if (div > 0)
		div -= 1;
	clk = clk_get_rate(hw->clk);
	div = DIV_ROUND_UP(clk, hz * 2) - 1;

	if (div > 255)
		div = 255;

	dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz);
	dev_dbg(&spi->dev, "setting pre-scaler to %d (wanted %d, got %ld)\n",
		div, hz, clk / (2 * (div + 1)));


	writeb(div, hw->regs + S3C2410_SPPRE);

	spin_lock(&hw->bitbang.lock);