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Commit b8662e75 authored by Hanumant Singh's avatar Hanumant Singh Committed by Matt Wagantall
Browse files

pinctrl: qcom: Add missing pin defintions for thulium 



Missing pin definitions result in erroneous register
offset calculations. Add in missing pin defintions.

Change-Id: I83537c944167f490cc48ede6c5a6001b2194b059
Signed-off-by: default avatarHanumant Singh <hanumant@codeaurora.org>
parent 61f9e572

drivers/pinctrl/qcom/pinctrl-msmthulium.c

+34 −1
Original line number Diff line number Diff line
@@ -191,6 +191,7 @@ static const struct pinctrl_pin_desc msmthulium_pins[] = { 
	PINCTRL_PIN(96, "GPIO_96"),

	PINCTRL_PIN(97, "GPIO_97"),

	PINCTRL_PIN(98, "GPIO_98"),

	PINCTRL_PIN(99, "GPIO_99"),

	PINCTRL_PIN(100, "GPIO_100"),

	PINCTRL_PIN(101, "GPIO_101"),

	PINCTRL_PIN(102, "GPIO_102"),
@@ -199,6 +200,7 @@ static const struct pinctrl_pin_desc msmthulium_pins[] = { 
	PINCTRL_PIN(105, "GPIO_105"),

	PINCTRL_PIN(106, "GPIO_106"),

	PINCTRL_PIN(107, "GPIO_107"),

	PINCTRL_PIN(108, "GPIO_108"),

	PINCTRL_PIN(109, "GPIO_109"),

	PINCTRL_PIN(110, "GPIO_110"),

	PINCTRL_PIN(111, "GPIO_111"),
@@ -216,16 +218,25 @@ static const struct pinctrl_pin_desc msmthulium_pins[] = { 
	PINCTRL_PIN(123, "GPIO_123"),

	PINCTRL_PIN(124, "GPIO_124"),

	PINCTRL_PIN(125, "GPIO_125"),

	PINCTRL_PIN(126, "GPIO_126"),

	PINCTRL_PIN(127, "GPIO_127"),

	PINCTRL_PIN(128, "GPIO_128"),

	PINCTRL_PIN(129, "GPIO_129"),

	PINCTRL_PIN(130, "GPIO_130"),

	PINCTRL_PIN(131, "GPIO_131"),

	PINCTRL_PIN(132, "GPIO_132"),

	PINCTRL_PIN(133, "GPIO_133"),

	PINCTRL_PIN(134, "GPIO_134"),

	PINCTRL_PIN(135, "GPIO_135"),

	PINCTRL_PIN(136, "GPIO_136"),

	PINCTRL_PIN(137, "GPIO_137"),

	PINCTRL_PIN(138, "GPIO_138"),

	PINCTRL_PIN(139, "GPIO_139"),

	PINCTRL_PIN(140, "GPIO_140"),

	PINCTRL_PIN(141, "GPIO_141"),

	PINCTRL_PIN(142, "GPIO_142"),

	PINCTRL_PIN(143, "GPIO_143"),

	PINCTRL_PIN(144, "GPIO_144"),

	PINCTRL_PIN(145, "GPIO_145"),

	PINCTRL_PIN(146, "GPIO_146"),

	PINCTRL_PIN(147, "GPIO_147"),
@@ -341,6 +352,7 @@ DECLARE_MSM_GPIO_PINS(95); 
DECLARE_MSM_GPIO_PINS(96);

DECLARE_MSM_GPIO_PINS(97);

DECLARE_MSM_GPIO_PINS(98);

DECLARE_MSM_GPIO_PINS(99);

DECLARE_MSM_GPIO_PINS(100);

DECLARE_MSM_GPIO_PINS(101);

DECLARE_MSM_GPIO_PINS(102);
@@ -349,6 +361,7 @@ DECLARE_MSM_GPIO_PINS(104); 
DECLARE_MSM_GPIO_PINS(105);

DECLARE_MSM_GPIO_PINS(106);

DECLARE_MSM_GPIO_PINS(107);

DECLARE_MSM_GPIO_PINS(108);

DECLARE_MSM_GPIO_PINS(109);

DECLARE_MSM_GPIO_PINS(110);

DECLARE_MSM_GPIO_PINS(111);
@@ -366,16 +379,25 @@ DECLARE_MSM_GPIO_PINS(122); 
DECLARE_MSM_GPIO_PINS(123);

DECLARE_MSM_GPIO_PINS(124);

DECLARE_MSM_GPIO_PINS(125);

DECLARE_MSM_GPIO_PINS(126);

DECLARE_MSM_GPIO_PINS(127);

DECLARE_MSM_GPIO_PINS(128);

DECLARE_MSM_GPIO_PINS(129);

DECLARE_MSM_GPIO_PINS(130);

DECLARE_MSM_GPIO_PINS(131);

DECLARE_MSM_GPIO_PINS(132);

DECLARE_MSM_GPIO_PINS(133);

DECLARE_MSM_GPIO_PINS(134);

DECLARE_MSM_GPIO_PINS(135);

DECLARE_MSM_GPIO_PINS(136);

DECLARE_MSM_GPIO_PINS(137);

DECLARE_MSM_GPIO_PINS(138);

DECLARE_MSM_GPIO_PINS(139);

DECLARE_MSM_GPIO_PINS(140);

DECLARE_MSM_GPIO_PINS(141);

DECLARE_MSM_GPIO_PINS(142);

DECLARE_MSM_GPIO_PINS(143);

DECLARE_MSM_GPIO_PINS(144);

DECLARE_MSM_GPIO_PINS(145);

DECLARE_MSM_GPIO_PINS(146);

DECLARE_MSM_GPIO_PINS(147);
@@ -1660,6 +1682,7 @@ static const struct msm_pingroup msmthulium_groups[] = { 
	PINGROUP(96, tsif2_sync, sdc40, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(97, ldo_en, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(98, ldo_update, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(100, blsp11_uart_tx_b, qdss_cti, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(101, blsp11_uart_rx_b, qdss_cti, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(102, blsp11_i2c_sda_b, prng_rosc, NA, NA, NA, NA, NA, NA, NA),
@@ -1668,6 +1691,7 @@ static const struct msm_pingroup msmthulium_groups[] = { 
	PINGROUP(105, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(106, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(108, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(109, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(110, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(111, NA, NA, NA, NA, NA, NA, NA, NA, NA),
@@ -1685,16 +1709,25 @@ static const struct msm_pingroup msmthulium_groups[] = { 
	PINGROUP(123, ddr_bist, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(124, ddr_bist, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(126, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(127, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(128, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(130, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(131, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(132, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(133, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(134, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(135, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(145, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(146, NA, NA, NA, NA, NA, NA, NA, NA, NA),

	PINGROUP(147, NA, NA, NA, NA, NA, NA, NA, NA, NA),
@@ -1716,7 +1749,7 @@ static const struct msm_pinctrl_soc_data msmthulium_pinctrl = { 
	.nfunctions = ARRAY_SIZE(msmthulium_functions),

	.groups = msmthulium_groups,

	.ngroups = ARRAY_SIZE(msmthulium_groups),

	.ngpios = 139,

	.ngpios = 150,

};



static int msmthulium_pinctrl_probe(struct platform_device *pdev)