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Commit b7af7b9e authored by Gilad Broner's avatar Gilad Broner Committed by Matt Wagantall
Browse files

ARM: dts: msm: add TSPP support for msm8996 



Add TSPP device tree node to support TSPP on msm8996,
together with the required pinctrl definitions.

Change-Id: Ibca09dd6c9e51d96f4809bb6b37826d4a0577631
Signed-off-by: default avatarGilad Broner <gbroner@codeaurora.org>
parent fb7e4c49

arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi

+56 −0
Original line number Original line Diff line number Diff line
@@ -1569,5 +1569,61 @@ 
				bias-disable;

				bias-disable;

			};

			};

		};

		};



		tsif0_signals_active: tsif0_signals_active {

			tsif1_clk {

				pins = "gpio89"; /* TSIF0 CLK */

				function = "tsif1_clk";

			};

			tsif1_en {

				pins = "gpio90"; /* TSIF0 Enable */

				function = "tsif1_en";

			};

			tsif1_data {

				pins = "gpio91"; /* TSIF0 DATA */

				function = "tsif1_data";

			};

			signals_cfg {

				pins = "gpio89", "gpio90", "gpio91";

				drive_strength = <2>;	/* 2 mA */

				bias-pull-down;		/* pull down */

			};

		};



		/* sync signal is only used if configured to mode-2 */

		tsif0_sync_active: tsif0_sync_active {

			pins = "gpio39";	/* TSIF0 SYNC */

			function = "tsif1_sync";

			drive_strength = <2>;	/* 2 mA */

			bias-pull-down;		/* pull down */

		};



		tsif1_signals_active: tsif1_signals_active {

			tsif2_clk {

				pins = "gpio93"; /* TSIF1 CLK */

				function = "tsif2_clk";

			};

			tsif2_en {

				pins = "gpio94"; /* TSIF1 Enable */

				function = "tsif2_en";

			};

			tsif2_data {

				pins = "gpio95"; /* TSIF1 DATA */

				function = "tsif2_data";

			};

			signals_cfg {

				pins = "gpio93", "gpio94", "gpio95";

				drive_strength = <2>;	/* 2 mA */

				bias-pull-down;		/* pull down */

			};

		};



		/* sync signal is only used if configured to mode-2 */

		tsif1_sync_active: tsif1_sync_active {

			pins = "gpio96";	/* TSIF1 SYNC */

			function = "tsif2_sync";

			drive_strength = <2>;	/* 2 mA */

			bias-pull-down;		/* pull down */

		};

	};

	};

};
 
};

arch/arm/boot/dts/qcom/msm8996.dtsi

+50 −0
Original line number Original line Diff line number Diff line
@@ -898,6 +898,56 @@ 
		#clock-cells = <1>;

		#clock-cells = <1>;

	};

	};





	tspp: msm_tspp@075e7000 {

		compatible = "qcom,msm_tspp";

		reg = <0x075e7000 0x1000>, /* MSM_TSIF0_PHYS */

		      <0x075e8000 0x1000>, /* MSM_TSIF1_PHYS */

		      <0x075e9000 0x1000>, /* MSM_TSPP_PHYS  */

		      <0x075c4000 0x11000>; /* MSM_TSPP_BAM_PHYS */

		reg-names = "MSM_TSIF0_PHYS",

			"MSM_TSIF1_PHYS",

			"MSM_TSPP_PHYS",

			"MSM_TSPP_BAM_PHYS";

		interrupts = <0 121 0>, /* TSIF_TSPP_IRQ */

			<0 119 0>, /* TSIF0_IRQ */

			<0 120 0>, /* TSIF1_IRQ */

			<0 122 0>; /* TSIF_BAM_IRQ */

		interrupt-names = "TSIF_TSPP_IRQ",

			"TSIF0_IRQ",

			"TSIF1_IRQ",

			"TSIF_BAM_IRQ";



		clock-names = "iface_clk", "ref_clk";

		clocks = <&clock_gcc clk_gcc_tsif_ahb_clk>,

			<&clock_gcc clk_gcc_tsif_ref_clk>;



		qcom,msm-bus,name = "tsif";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<82 512 0 0>, /* No vote */

				<82 512 12288 24576>; /* Max. bandwidth, 2xTSIF, each max of 96Mbps */



		pinctrl-names = "disabled",

			"tsif0-mode1", "tsif0-mode2",

			"tsif1-mode1", "tsif1-mode2",

			"dual-tsif-mode1", "dual-tsif-mode2";



		pinctrl-0 = <>;				/* disabled */

		pinctrl-1 = <&tsif0_signals_active>;	/* tsif0-mode1 */

		pinctrl-2 = <&tsif0_signals_active

			&tsif0_sync_active>;		/* tsif0-mode2 */

		pinctrl-3 = <&tsif1_signals_active>;	/* tsif1-mode1 */

		pinctrl-4 = <&tsif1_signals_active

			&tsif1_sync_active>;		/* tsif1-mode2 */

		pinctrl-5 = <&tsif0_signals_active

			&tsif1_signals_active>;		/* dual-tsif-mode1 */

		pinctrl-6 = <&tsif0_signals_active

			&tsif0_sync_active

			&tsif1_signals_active

			&tsif1_sync_active>;		/* dual-tsif-mode2 */

	};



	slim_msm: slim@91c0000 {

	slim_msm: slim@91c0000 {

		cell-index = <1>;

		cell-index = <1>;

		compatible = "qcom,slim-ngd";

		compatible = "qcom,slim-ngd";