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Commit b75cc0e4 authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
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tg3: Assign correct tx margin for 5719



Commit d309a46e, entitled
"tg3: 5719: Prevent tx data corruption", was supposed to contain the tx
margin adjustment but it looks like it somehow was omitted.  This patch
fixes the problem.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Reviewed-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5093eedc
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+4 −0
Original line number Diff line number Diff line
@@ -8206,6 +8206,10 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
	    (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
		val = tr32(TG3_RDMA_RSRVCTRL_REG);
		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
			val &= ~TG3_RDMA_RSRVCTRL_TXMRGN_MASK;
			val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B;
		}
		tw32(TG3_RDMA_RSRVCTRL_REG,
		     val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX);
	}
+2 −0
Original line number Diff line number Diff line
@@ -1327,6 +1327,8 @@

#define TG3_RDMA_RSRVCTRL_REG		0x00004900
#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX	 0x00000004
#define TG3_RDMA_RSRVCTRL_TXMRGN_320B	 0x28000000
#define TG3_RDMA_RSRVCTRL_TXMRGN_MASK	 0xffe00000
/* 0x4904 --> 0x4910 unused */

#define TG3_LSO_RD_DMA_CRPTEN_CTRL	0x00004910