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Commit b7147f1e authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: msm: clock-osm: Set the HMSS GPLL0 RCG to run at 300MHz 



The default settings of the gcc_hmss_gpll0_clk_src make it
run at 600 MHz. Call set rate on the clock so that its
divider settings can be programmed.

CRs-Fixed: 989118
Change-Id: I49aee860dd3f0f4f7ecb024228f182d126424906
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent e3ea6c56

drivers/clk/msm/clock-osm.c

+8 −0
Original line number Diff line number Diff line
@@ -1856,6 +1856,12 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev) 
	 * frequency before enabling OSM. LUT index 0 is always sourced from

	 * this clock.

	 */

	rc = clk_set_rate(&sys_apcsaux_clk_gcc.c, init_rate);

	if (rc) {

		dev_err(&pdev->dev, "Unable to set init rate on hmss_gpll0, rc=%d\n",

			rc);

		return rc;

	}

	clk_prepare_enable(&sys_apcsaux_clk_gcc.c);



	/* Set 300MHz index */
@@ -1863,6 +1869,7 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev) 
	if (rc) {

		dev_err(&pdev->dev, "Unable to set init rate on pwr cluster, rc=%d\n",

			rc);

		clk_disable_unprepare(&sys_apcsaux_clk_gcc.c);

		return rc;

	}
@@ -1870,6 +1877,7 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev) 
	if (rc) {

		dev_err(&pdev->dev, "Unable to set init rate on perf cluster, rc=%d\n",

			rc);

		clk_disable_unprepare(&sys_apcsaux_clk_gcc.c);

		return rc;

	}