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Commit b6db8cdd authored by Xu Han's avatar Xu Han
Browse files

ARM: dts: msm: Increase CSIPHY clock rate on 8996 



Increase CSIPHY clock rate to support high data rate camera sensors
on msm8996.

Change-Id: Ia0370605a1361b23a73fd1352ee4b071be4782c1
Signed-off-by: default avatarXu Han <hanxu@codeaurora.org>
parent 41747adc

arch/arm/boot/dts/qcom/msm8996-camera.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ 
			"ispif_ahb_clk", "csiphy_timer_src_clk",

			"csiphy_timer_clk", "camss_ahb_clk",

			"csiphy_3p_clk_src", "csi_phy_3p_clk";

		qcom,clock-rates = <0 0 200000000 0 0 100000000 0>;

		qcom,clock-rates = <0 0 266670000 0 0 200000000 0>;

	};



	qcom,csiphy@a35000 {
@@ -60,7 +60,7 @@ 
			"ispif_ahb_clk", "csiphy_timer_src_clk",

			"csiphy_timer_clk", "camss_ahb_clk",

			"csiphy_3p_clk_src", "csi_phy_3p_clk";

		qcom,clock-rates = <0 0 200000000 0 0 100000000 0>;

		qcom,clock-rates = <0 0 266670000 0 0 200000000 0>;

	};



	qcom,csiphy@a36000 {
@@ -81,7 +81,7 @@ 
			"ispif_ahb_clk", "csiphy_timer_src_clk",

			"csiphy_timer_clk", "camss_ahb_clk",

			"csiphy_3p_clk_src", "csi_phy_3p_clk";

		qcom,clock-rates = <0 0 200000000 0 0 100000000 0>;

		qcom,clock-rates = <0 0 266670000 0 0 200000000 0>;

	};



	qcom,csid@a30000  {