Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b6bb9a64 authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Simon Horman
Browse files

ARM: shmobile: r8a7778: add support I2C clock 



This patch adds r8a7778 I2C clock support.
It also adds peripheral_clk which is requiested
from i2c-rcar driver

Signed-off-by: default avatarYusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 729cb826

arch/arm/mach-shmobile/clock-r8a7778.c

+13 −1
Original line number Diff line number Diff line
@@ -105,7 +105,8 @@ static struct clk *main_clks[] = { 
enum {

	MSTP323, MSTP322, MSTP321,

	MSTP114,

	MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,

	MSTP030,

	MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,

	MSTP016, MSTP015,

	MSTP_NR };
@@ -114,6 +115,10 @@ static struct clk mstp_clks[MSTP_NR] = { 
	[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */

	[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */

	[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */

	[MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */

	[MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */

	[MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */

	[MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */

	[MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */

	[MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */

	[MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
@@ -125,11 +130,18 @@ static struct clk mstp_clks[MSTP_NR] = { 
};



static struct clk_lookup lookups[] = {

	/* main */

	CLKDEV_CON_ID("peripheral_clk",	&p_clk),



	/* MSTP32 clocks */

	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */

	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */

	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */

	CLKDEV_DEV_ID("sh-eth",	&mstp_clks[MSTP114]), /* Ether */

	CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */

	CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */

	CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */

	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */

	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */

	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */

	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */