Loading arch/sparc/kernel/ds.c +1 −0 Original line number Diff line number Diff line Loading @@ -544,6 +544,7 @@ static int __cpuinit dr_cpu_configure(struct ds_info *dp, resp_len, ncpus, mask, DR_CPU_STAT_CONFIGURED); mdesc_populate_present_mask(mask); mdesc_fill_in_cpu_data(mask); for_each_cpu_mask(cpu, *mask) { Loading arch/sparc/kernel/mdesc.c +0 −1 Original line number Diff line number Diff line Loading @@ -861,7 +861,6 @@ void __cpuinit mdesc_fill_in_cpu_data(cpumask_t *mask) { struct mdesc_handle *hp; mdesc_populate_present_mask(mask); mdesc_iterate_over_cpus(fill_in_one_cpu, NULL, mask); #ifdef CONFIG_SMP Loading arch/sparc/kernel/prom_64.c +0 −1 Original line number Diff line number Diff line Loading @@ -535,7 +535,6 @@ void __init of_fill_in_cpu_data(void) if (tlb_type == hypervisor) return; of_populate_present_mask(); of_iterate_over_cpus(fill_in_one_cpu, 0); smp_fill_in_sib_core_maps(); Loading arch/sparc/kernel/smp_64.c +4 −0 Original line number Diff line number Diff line Loading @@ -1399,4 +1399,8 @@ void __init real_setup_per_cpu_areas(void) /* Setup %g5 for the boot cpu. */ __local_per_cpu_offset = __per_cpu_offset(smp_processor_id()); of_fill_in_cpu_data(); if (tlb_type == hypervisor) mdesc_fill_in_cpu_data(CPU_MASK_ALL_PTR); } arch/sparc/mm/init_64.c +4 −8 Original line number Diff line number Diff line Loading @@ -1799,20 +1799,16 @@ void __init paging_init(void) if (tlb_type == hypervisor) sun4v_ktsb_register(); /* We must setup the per-cpu areas before we pull in the * PROM and the MDESC. The code there fills in cpu and * other information into per-cpu data structures. */ real_setup_per_cpu_areas(); prom_build_devicetree(); of_fill_in_cpu_data(); of_populate_present_mask(); if (tlb_type == hypervisor) { sun4v_mdesc_init(); mdesc_fill_in_cpu_data(CPU_MASK_ALL_PTR); mdesc_populate_present_mask(CPU_MASK_ALL_PTR); } real_setup_per_cpu_areas(); /* Once the OF device tree and MDESC have been setup, we know * the list of possible cpus. Therefore we can allocate the * IRQ stacks. Loading Loading
arch/sparc/kernel/ds.c +1 −0 Original line number Diff line number Diff line Loading @@ -544,6 +544,7 @@ static int __cpuinit dr_cpu_configure(struct ds_info *dp, resp_len, ncpus, mask, DR_CPU_STAT_CONFIGURED); mdesc_populate_present_mask(mask); mdesc_fill_in_cpu_data(mask); for_each_cpu_mask(cpu, *mask) { Loading
arch/sparc/kernel/mdesc.c +0 −1 Original line number Diff line number Diff line Loading @@ -861,7 +861,6 @@ void __cpuinit mdesc_fill_in_cpu_data(cpumask_t *mask) { struct mdesc_handle *hp; mdesc_populate_present_mask(mask); mdesc_iterate_over_cpus(fill_in_one_cpu, NULL, mask); #ifdef CONFIG_SMP Loading
arch/sparc/kernel/prom_64.c +0 −1 Original line number Diff line number Diff line Loading @@ -535,7 +535,6 @@ void __init of_fill_in_cpu_data(void) if (tlb_type == hypervisor) return; of_populate_present_mask(); of_iterate_over_cpus(fill_in_one_cpu, 0); smp_fill_in_sib_core_maps(); Loading
arch/sparc/kernel/smp_64.c +4 −0 Original line number Diff line number Diff line Loading @@ -1399,4 +1399,8 @@ void __init real_setup_per_cpu_areas(void) /* Setup %g5 for the boot cpu. */ __local_per_cpu_offset = __per_cpu_offset(smp_processor_id()); of_fill_in_cpu_data(); if (tlb_type == hypervisor) mdesc_fill_in_cpu_data(CPU_MASK_ALL_PTR); }
arch/sparc/mm/init_64.c +4 −8 Original line number Diff line number Diff line Loading @@ -1799,20 +1799,16 @@ void __init paging_init(void) if (tlb_type == hypervisor) sun4v_ktsb_register(); /* We must setup the per-cpu areas before we pull in the * PROM and the MDESC. The code there fills in cpu and * other information into per-cpu data structures. */ real_setup_per_cpu_areas(); prom_build_devicetree(); of_fill_in_cpu_data(); of_populate_present_mask(); if (tlb_type == hypervisor) { sun4v_mdesc_init(); mdesc_fill_in_cpu_data(CPU_MASK_ALL_PTR); mdesc_populate_present_mask(CPU_MASK_ALL_PTR); } real_setup_per_cpu_areas(); /* Once the OF device tree and MDESC have been setup, we know * the list of possible cpus. Therefore we can allocate the * IRQ stacks. Loading