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Commit b689f36d authored Jul 31, 2015 by Hanumant Singh

arm64: Mask out 16KB granule in MMFR register



Memory model feature register specifies the supported
page granules. Some ARM cpus may have support for
16KB granules.
However currently we donot support 16KB pages sizes.
Explicitly mask off that capability if advertised by
the cpu.

Change-Id: I7daf3f179a5ce103aec7cf103ac198cf64800543
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>

parent 0c37cc25

arch/arm64/include/asm/cputype.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,10 @@
		#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
		((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)

		#define MMFR0_16KGRAN_SIZE 15
		#define MMFR0_16KGRAN_SHFT 20
		#define MMFR0_EL1_16KGRAN_MASK (MMFR0_16KGRAN_SIZE << MMFR0_16KGRAN_SHFT)

		#define read_cpuid(reg) ({ \
		u64 __val; \
		asm("mrs %0, " #reg : "=r" (__val)); \

arch/arm64/kernel/cpuinfo.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -189,7 +189,12 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)

		info->reg_id_aa64isar0 = read_cpuid(ID_AA64ISAR0_EL1);
		info->reg_id_aa64isar1 = read_cpuid(ID_AA64ISAR1_EL1);
		info->reg_id_aa64mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);
		/*
		* Explicitly mask out 16KB granule since we donot
		* want to support it
		*/
		info->reg_id_aa64mmfr0 = read_cpuid(ID_AA64MMFR0_EL1) &
		(~MMFR0_EL1_16KGRAN_MASK);
		info->reg_id_aa64mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
		info->reg_id_aa64pfr0 = read_cpuid(ID_AA64PFR0_EL1);
		info->reg_id_aa64pfr1 = read_cpuid(ID_AA64PFR1_EL1);