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Commit b6897130 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

Pull powerpc uapi disintegration from Benjamin Herrenschmidt.

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  UAPI: (Scripted) Disintegrate arch/powerpc/include/asm
parents b4fe19f7 fd3bc66f

arch/powerpc/include/asm/Kbuild

+0 −35
Original line number Diff line number Diff line 
include include/asm-generic/Kbuild.asm



header-y += auxvec.h

header-y += bootx.h

header-y += byteorder.h

header-y += cputable.h

header-y += elf.h

header-y += errno.h

header-y += fcntl.h

header-y += ioctl.h

header-y += ioctls.h

header-y += ipcbuf.h

header-y += linkage.h

header-y += msgbuf.h

header-y += nvram.h

header-y += param.h

header-y += poll.h

header-y += posix_types.h

header-y += ps3fb.h

header-y += resource.h

header-y += seccomp.h

header-y += sembuf.h

header-y += shmbuf.h

header-y += sigcontext.h

header-y += siginfo.h

header-y += signal.h

header-y += socket.h

header-y += sockios.h

header-y += spu_info.h

header-y += stat.h

header-y += statfs.h

header-y += termbits.h

header-y += termios.h

header-y += types.h

header-y += ucontext.h

header-y += unistd.h



generic-y += clkdev.h

generic-y += rwsem.h

arch/powerpc/include/asm/bootx.h

+1 −122
Original line number Diff line number Diff line
@@ -5,126 +5,11 @@ 
 * Written by Benjamin Herrenschmidt.

 */





#ifndef __ASM_BOOTX_H__

#define __ASM_BOOTX_H__



#include <linux/types.h>



#ifdef macintosh

#include <Types.h>

#include "linux_type_defs.h"

#endif



#ifdef macintosh

/* All this requires PowerPC alignment */

#pragma options align=power

#endif



/* On kernel entry:

 *

 * r3 = 0x426f6f58    ('BooX')

 * r4 = pointer to boot_infos

 * r5 = NULL

 *

 * Data and instruction translation disabled, interrupts

 * disabled, kernel loaded at physical 0x00000000 on PCI

 * machines (will be different on NuBus).

 */



#define BOOT_INFO_VERSION               5

#define BOOT_INFO_COMPATIBLE_VERSION    1



/* Bit in the architecture flag mask. More to be defined in

   future versions. Note that either BOOT_ARCH_PCI or

   BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are

   set additionally when BOOT_ARCH_NUBUS is set.

 */

#define BOOT_ARCH_PCI                   0x00000001UL

#define BOOT_ARCH_NUBUS                 0x00000002UL

#define BOOT_ARCH_NUBUS_PDM             0x00000010UL

#define BOOT_ARCH_NUBUS_PERFORMA        0x00000020UL

#define BOOT_ARCH_NUBUS_POWERBOOK       0x00000040UL



/*  Maximum number of ranges in phys memory map */

#define MAX_MEM_MAP_SIZE				26



/* This is the format of an element in the physical memory map. Note that

   the map is optional and current BootX will only build it for pre-PCI

   machines */

typedef struct boot_info_map_entry

{

    __u32       physAddr;                /* Physical starting address */

    __u32       size;                    /* Size in bytes */

} boot_info_map_entry_t;





/* Here are the boot informations that are passed to the bootstrap

 * Note that the kernel arguments and the device tree are appended

 * at the end of this structure. */

typedef struct boot_infos

{

    /* Version of this structure */

    __u32       version;

    /* backward compatible down to version: */

    __u32       compatible_version;



    /* NEW (vers. 2) this holds the current _logical_ base addr of

       the frame buffer (for use by early boot message) */

    __u8*       logicalDisplayBase;

#include <uapi/asm/bootx.h>



    /* NEW (vers. 4) Apple's machine identification */

    __u32       machineID;



    /* NEW (vers. 4) Detected hw architecture */

    __u32       architecture;



    /* The device tree (internal addresses relative to the beginning of the tree,

     * device tree offset relative to the beginning of this structure).

     * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this

     * field is 0.

     */

    __u32       deviceTreeOffset;        /* Device tree offset */

    __u32       deviceTreeSize;          /* Size of the device tree */



    /* Some infos about the current MacOS display */

    __u32       dispDeviceRect[4];       /* left,top,right,bottom */

    __u32       dispDeviceDepth;         /* (8, 16 or 32) */

    __u8*       dispDeviceBase;          /* base address (physical) */

    __u32       dispDeviceRowBytes;      /* rowbytes (in bytes) */

    __u32       dispDeviceColorsOffset;  /* Colormap (8 bits only) or 0 (*) */

    /* Optional offset in the registry to the current

     * MacOS display. (Can be 0 when not detected) */

     __u32      dispDeviceRegEntryOffset;



    /* Optional pointer to boot ramdisk (offset from this structure) */

    __u32       ramDisk;

    __u32       ramDiskSize;             /* size of ramdisk image */



    /* Kernel command line arguments (offset from this structure) */

    __u32       kernelParamsOffset;



    /* ALL BELOW NEW (vers. 4) */



    /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag

       (non-PCI) only. On PCI, memory is contiguous and it's size is in the

       device-tree. */

    boot_info_map_entry_t

    	        physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */

    __u32       physMemoryMapSize;               /* How many entries in map */





    /* The framebuffer size (optional, currently 0) */

    __u32       frameBufferSize;         /* Represents a max size, can be 0. */



    /* NEW (vers. 5) */



    /* Total params size (args + colormap + device tree + ramdisk) */

    __u32       totalParamsSize;



} boot_infos_t;



#ifdef __KERNEL__

/* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index

 * is represented by 3 short words containing a 16 bits (unsigned) color

 * component. Later versions may contain the gamma table for direct-color
@@ -162,10 +47,4 @@ struct bootx_dt_node { 


extern void bootx_init(unsigned long r4, unsigned long phys);



#endif /* __KERNEL__ */



#ifdef macintosh

#pragma options align=reset

#endif



#endif

arch/powerpc/include/asm/cputable.h

+1 −34
Original line number Diff line number Diff line 
#ifndef __ASM_POWERPC_CPUTABLE_H

#define __ASM_POWERPC_CPUTABLE_H



#define PPC_FEATURE_32			0x80000000

#define PPC_FEATURE_64			0x40000000

#define PPC_FEATURE_601_INSTR		0x20000000

#define PPC_FEATURE_HAS_ALTIVEC		0x10000000

#define PPC_FEATURE_HAS_FPU		0x08000000

#define PPC_FEATURE_HAS_MMU		0x04000000

#define PPC_FEATURE_HAS_4xxMAC		0x02000000

#define PPC_FEATURE_UNIFIED_CACHE	0x01000000

#define PPC_FEATURE_HAS_SPE		0x00800000

#define PPC_FEATURE_HAS_EFP_SINGLE	0x00400000

#define PPC_FEATURE_HAS_EFP_DOUBLE	0x00200000

#define PPC_FEATURE_NO_TB		0x00100000

#define PPC_FEATURE_POWER4		0x00080000

#define PPC_FEATURE_POWER5		0x00040000

#define PPC_FEATURE_POWER5_PLUS		0x00020000

#define PPC_FEATURE_CELL		0x00010000

#define PPC_FEATURE_BOOKE		0x00008000

#define PPC_FEATURE_SMT			0x00004000

#define PPC_FEATURE_ICACHE_SNOOP	0x00002000

#define PPC_FEATURE_ARCH_2_05		0x00001000

#define PPC_FEATURE_PA6T		0x00000800

#define PPC_FEATURE_HAS_DFP		0x00000400

#define PPC_FEATURE_POWER6_EXT		0x00000200

#define PPC_FEATURE_ARCH_2_06		0x00000100

#define PPC_FEATURE_HAS_VSX		0x00000080



#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \

					0x00000040



#define PPC_FEATURE_TRUE_LE		0x00000002

#define PPC_FEATURE_PPC_LE		0x00000001



#ifdef __KERNEL__



#include <asm/asm-compat.h>

#include <asm/feature-fixups.h>

#include <uapi/asm/cputable.h>



#ifndef __ASSEMBLY__
@@ -557,5 +525,4 @@ static inline int cpu_has_feature(unsigned long feature) 


#endif /* !__ASSEMBLY__ */



#endif /* __KERNEL__ */

#endif /* __ASM_POWERPC_CPUTABLE_H */

arch/powerpc/include/asm/elf.h

+6 −305
Original line number Diff line number Diff line 
#ifndef _ASM_POWERPC_ELF_H

#define _ASM_POWERPC_ELF_H



#ifdef __KERNEL__

#include <linux/sched.h>	/* for task_struct */

#include <asm/page.h>

#include <asm/string.h>

#endif



#include <linux/types.h>



#include <asm/ptrace.h>

#include <asm/cputable.h>

#include <asm/auxvec.h>



/* PowerPC relocations defined by the ABIs */

#define R_PPC_NONE		0

#define R_PPC_ADDR32		1	/* 32bit absolute address */

#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */

#define R_PPC_ADDR16		3	/* 16bit absolute address */

#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */

#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */

#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */

#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */

#define R_PPC_ADDR14_BRTAKEN	8

#define R_PPC_ADDR14_BRNTAKEN	9

#define R_PPC_REL24		10	/* PC relative 26 bit */

#define R_PPC_REL14		11	/* PC relative 16 bit */

#define R_PPC_REL14_BRTAKEN	12

#define R_PPC_REL14_BRNTAKEN	13

#define R_PPC_GOT16		14

#define R_PPC_GOT16_LO		15

#define R_PPC_GOT16_HI		16

#define R_PPC_GOT16_HA		17

#define R_PPC_PLTREL24		18

#define R_PPC_COPY		19

#define R_PPC_GLOB_DAT		20

#define R_PPC_JMP_SLOT		21

#define R_PPC_RELATIVE		22

#define R_PPC_LOCAL24PC		23

#define R_PPC_UADDR32		24

#define R_PPC_UADDR16		25

#define R_PPC_REL32		26

#define R_PPC_PLT32		27

#define R_PPC_PLTREL32		28

#define R_PPC_PLT16_LO		29

#define R_PPC_PLT16_HI		30

#define R_PPC_PLT16_HA		31

#define R_PPC_SDAREL16		32

#define R_PPC_SECTOFF		33

#define R_PPC_SECTOFF_LO	34

#define R_PPC_SECTOFF_HI	35

#define R_PPC_SECTOFF_HA	36



/* PowerPC relocations defined for the TLS access ABI.  */

#define R_PPC_TLS		67 /* none	(sym+add)@tls */

#define R_PPC_DTPMOD32		68 /* word32	(sym+add)@dtpmod */

#define R_PPC_TPREL16		69 /* half16*	(sym+add)@tprel */

#define R_PPC_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */

#define R_PPC_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */

#define R_PPC_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */

#define R_PPC_TPREL32		73 /* word32	(sym+add)@tprel */

#define R_PPC_DTPREL16		74 /* half16*	(sym+add)@dtprel */

#define R_PPC_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */

#define R_PPC_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */

#define R_PPC_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */

#define R_PPC_DTPREL32		78 /* word32	(sym+add)@dtprel */

#define R_PPC_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */

#define R_PPC_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */

#define R_PPC_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */

#define R_PPC_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */

#define R_PPC_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */

#define R_PPC_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */

#define R_PPC_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */

#define R_PPC_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */

#define R_PPC_GOT_TPREL16	87 /* half16*	(sym+add)@got@tprel */

#define R_PPC_GOT_TPREL16_LO	88 /* half16	(sym+add)@got@tprel@l */

#define R_PPC_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */

#define R_PPC_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */

#define R_PPC_GOT_DTPREL16	91 /* half16*	(sym+add)@got@dtprel */

#define R_PPC_GOT_DTPREL16_LO	92 /* half16*	(sym+add)@got@dtprel@l */

#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */

#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */



/* keep this the last entry. */

#define R_PPC_NUM		95



/*

 * ELF register definitions..

 *
@@ -93,77 +6,14 @@ 
 * as published by the Free Software Foundation; either version

 * 2 of the License, or (at your option) any later version.

 */

#ifndef _ASM_POWERPC_ELF_H

#define _ASM_POWERPC_ELF_H



#define ELF_NGREG	48	/* includes nip, msr, lr, etc. */

#define ELF_NFPREG	33	/* includes fpscr */



typedef unsigned long elf_greg_t64;

typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];



typedef unsigned int elf_greg_t32;

typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];

typedef elf_gregset_t32 compat_elf_gregset_t;



/*

 * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.

 */

#ifdef __powerpc64__

# define ELF_NVRREG32	33	/* includes vscr & vrsave stuffed together */

# define ELF_NVRREG	34	/* includes vscr & vrsave in split vectors */

# define ELF_NVSRHALFREG 32	/* Half the vsx registers */

# define ELF_GREG_TYPE	elf_greg_t64

#else

# define ELF_NEVRREG	34	/* includes acc (as 2) */

# define ELF_NVRREG	33	/* includes vscr */

# define ELF_GREG_TYPE	elf_greg_t32

# define ELF_ARCH	EM_PPC

# define ELF_CLASS	ELFCLASS32

# define ELF_DATA	ELFDATA2MSB

#endif /* __powerpc64__ */



#ifndef ELF_ARCH

# define ELF_ARCH	EM_PPC64

# define ELF_CLASS	ELFCLASS64

# define ELF_DATA	ELFDATA2MSB

  typedef elf_greg_t64 elf_greg_t;

  typedef elf_gregset_t64 elf_gregset_t;

#else

  /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */

  typedef elf_greg_t32 elf_greg_t;

  typedef elf_gregset_t32 elf_gregset_t;

#endif /* ELF_ARCH */



/* Floating point registers */

typedef double elf_fpreg_t;

typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];



/* Altivec registers */

/*

 * The entries with indexes 0-31 contain the corresponding vector registers. 

 * The entry with index 32 contains the vscr as the last word (offset 12) 

 * within the quadword.  This allows the vscr to be stored as either a 

 * quadword (since it must be copied via a vector register to/from storage) 

 * or as a word.  

 *

 * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first  

 * word (offset 0) within the quadword.

 *

 * This definition of the VMX state is compatible with the current PPC32 

 * ptrace interface.  This allows signal handling and ptrace to use the same 

 * structures.  This also simplifies the implementation of a bi-arch 

 * (combined (32- and 64-bit) gdb.

 *

 * Note that it's _not_ compatible with 32 bits ucontext which stuffs the

 * vrsave along with vscr and so only uses 33 vectors for the register set

 */

typedef __vector128 elf_vrreg_t;

typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];

#ifdef __powerpc64__

typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];

typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];

#endif

#include <linux/sched.h>	/* for task_struct */

#include <asm/page.h>

#include <asm/string.h>

#include <uapi/asm/elf.h>



#ifdef __KERNEL__

/*

 * This is used to ensure we don't load something for the wrong architecture.

 */
@@ -277,153 +127,6 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm, 
extern unsigned long arch_randomize_brk(struct mm_struct *mm);

#define arch_randomize_brk arch_randomize_brk



#endif /* __KERNEL__ */



/*

 * The requirements here are:

 * - keep the final alignment of sp (sp & 0xf)

 * - make sure the 32-bit value at the first 16 byte aligned position of

 *   AUXV is greater than 16 for glibc compatibility.

 *   AT_IGNOREPPC is used for that.

 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,

 *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.

 * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes

 */

#define ARCH_DLINFO							\

do {									\

	/* Handle glibc compatibility. */				\

	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\

	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\

	/* Cache size items */						\

	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);			\

	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);			\

	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);			\

	VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);	\

} while (0)



/* PowerPC64 relocations defined by the ABIs */

#define R_PPC64_NONE    R_PPC_NONE

#define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */

#define R_PPC64_ADDR24  R_PPC_ADDR24  /* 26bit address, word aligned.  */

#define R_PPC64_ADDR16  R_PPC_ADDR16  /* 16bit absolute address. */

#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address.  */

#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */

#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits.  */

#define R_PPC64_ADDR14 R_PPC_ADDR14   /* 16bit address, word aligned.  */

#define R_PPC64_ADDR14_BRTAKEN  R_PPC_ADDR14_BRTAKEN

#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN

#define R_PPC64_REL24   R_PPC_REL24 /* PC relative 26 bit, word aligned.  */

#define R_PPC64_REL14   R_PPC_REL14 /* PC relative 16 bit. */

#define R_PPC64_REL14_BRTAKEN   R_PPC_REL14_BRTAKEN

#define R_PPC64_REL14_BRNTAKEN  R_PPC_REL14_BRNTAKEN

#define R_PPC64_GOT16     R_PPC_GOT16

#define R_PPC64_GOT16_LO  R_PPC_GOT16_LO

#define R_PPC64_GOT16_HI  R_PPC_GOT16_HI

#define R_PPC64_GOT16_HA  R_PPC_GOT16_HA



#define R_PPC64_COPY      R_PPC_COPY

#define R_PPC64_GLOB_DAT  R_PPC_GLOB_DAT

#define R_PPC64_JMP_SLOT  R_PPC_JMP_SLOT

#define R_PPC64_RELATIVE  R_PPC_RELATIVE



#define R_PPC64_UADDR32   R_PPC_UADDR32

#define R_PPC64_UADDR16   R_PPC_UADDR16

#define R_PPC64_REL32     R_PPC_REL32

#define R_PPC64_PLT32     R_PPC_PLT32

#define R_PPC64_PLTREL32  R_PPC_PLTREL32

#define R_PPC64_PLT16_LO  R_PPC_PLT16_LO

#define R_PPC64_PLT16_HI  R_PPC_PLT16_HI

#define R_PPC64_PLT16_HA  R_PPC_PLT16_HA



#define R_PPC64_SECTOFF     R_PPC_SECTOFF

#define R_PPC64_SECTOFF_LO  R_PPC_SECTOFF_LO

#define R_PPC64_SECTOFF_HI  R_PPC_SECTOFF_HI

#define R_PPC64_SECTOFF_HA  R_PPC_SECTOFF_HA

#define R_PPC64_ADDR30          37  /* word30 (S + A - P) >> 2.  */

#define R_PPC64_ADDR64          38  /* doubleword64 S + A.  */

#define R_PPC64_ADDR16_HIGHER   39  /* half16 #higher(S + A).  */

#define R_PPC64_ADDR16_HIGHERA  40  /* half16 #highera(S + A).  */

#define R_PPC64_ADDR16_HIGHEST  41  /* half16 #highest(S + A).  */

#define R_PPC64_ADDR16_HIGHESTA 42  /* half16 #highesta(S + A). */

#define R_PPC64_UADDR64     43  /* doubleword64 S + A.  */

#define R_PPC64_REL64       44  /* doubleword64 S + A - P.  */

#define R_PPC64_PLT64       45  /* doubleword64 L + A.  */

#define R_PPC64_PLTREL64    46  /* doubleword64 L + A - P.  */

#define R_PPC64_TOC16       47  /* half16* S + A - .TOC.  */

#define R_PPC64_TOC16_LO    48  /* half16 #lo(S + A - .TOC.).  */

#define R_PPC64_TOC16_HI    49  /* half16 #hi(S + A - .TOC.).  */

#define R_PPC64_TOC16_HA    50  /* half16 #ha(S + A - .TOC.).  */

#define R_PPC64_TOC         51  /* doubleword64 .TOC. */

#define R_PPC64_PLTGOT16    52  /* half16* M + A.  */

#define R_PPC64_PLTGOT16_LO 53  /* half16 #lo(M + A).  */

#define R_PPC64_PLTGOT16_HI 54  /* half16 #hi(M + A).  */

#define R_PPC64_PLTGOT16_HA 55  /* half16 #ha(M + A).  */



#define R_PPC64_ADDR16_DS      56 /* half16ds* (S + A) >> 2.  */

#define R_PPC64_ADDR16_LO_DS   57 /* half16ds  #lo(S + A) >> 2.  */

#define R_PPC64_GOT16_DS       58 /* half16ds* (G + A) >> 2.  */

#define R_PPC64_GOT16_LO_DS    59 /* half16ds  #lo(G + A) >> 2.  */

#define R_PPC64_PLT16_LO_DS    60 /* half16ds  #lo(L + A) >> 2.  */

#define R_PPC64_SECTOFF_DS     61 /* half16ds* (R + A) >> 2.  */

#define R_PPC64_SECTOFF_LO_DS  62 /* half16ds  #lo(R + A) >> 2.  */

#define R_PPC64_TOC16_DS       63 /* half16ds* (S + A - .TOC.) >> 2.  */

#define R_PPC64_TOC16_LO_DS    64 /* half16ds  #lo(S + A - .TOC.) >> 2.  */

#define R_PPC64_PLTGOT16_DS    65 /* half16ds* (M + A) >> 2.  */

#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds  #lo(M + A) >> 2.  */



/* PowerPC64 relocations defined for the TLS access ABI.  */

#define R_PPC64_TLS		67 /* none	(sym+add)@tls */

#define R_PPC64_DTPMOD64	68 /* doubleword64 (sym+add)@dtpmod */

#define R_PPC64_TPREL16		69 /* half16*	(sym+add)@tprel */

#define R_PPC64_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */

#define R_PPC64_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */

#define R_PPC64_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */

#define R_PPC64_TPREL64		73 /* doubleword64 (sym+add)@tprel */

#define R_PPC64_DTPREL16	74 /* half16*	(sym+add)@dtprel */

#define R_PPC64_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */

#define R_PPC64_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */

#define R_PPC64_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */

#define R_PPC64_DTPREL64	78 /* doubleword64 (sym+add)@dtprel */

#define R_PPC64_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */

#define R_PPC64_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */

#define R_PPC64_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */

#define R_PPC64_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */

#define R_PPC64_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */

#define R_PPC64_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */

#define R_PPC64_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */

#define R_PPC64_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */

#define R_PPC64_GOT_TPREL16_DS	87 /* half16ds*	(sym+add)@got@tprel */

#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */

#define R_PPC64_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */

#define R_PPC64_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */

#define R_PPC64_GOT_DTPREL16_DS	91 /* half16ds*	(sym+add)@got@dtprel */

#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */

#define R_PPC64_GOT_DTPREL16_HI	93 /* half16	(sym+add)@got@dtprel@h */

#define R_PPC64_GOT_DTPREL16_HA	94 /* half16	(sym+add)@got@dtprel@ha */

#define R_PPC64_TPREL16_DS	95 /* half16ds*	(sym+add)@tprel */

#define R_PPC64_TPREL16_LO_DS	96 /* half16ds	(sym+add)@tprel@l */

#define R_PPC64_TPREL16_HIGHER	97 /* half16	(sym+add)@tprel@higher */

#define R_PPC64_TPREL16_HIGHERA	98 /* half16	(sym+add)@tprel@highera */

#define R_PPC64_TPREL16_HIGHEST	99 /* half16	(sym+add)@tprel@highest */

#define R_PPC64_TPREL16_HIGHESTA 100 /* half16	(sym+add)@tprel@highesta */

#define R_PPC64_DTPREL16_DS	101 /* half16ds* (sym+add)@dtprel */

#define R_PPC64_DTPREL16_LO_DS	102 /* half16ds	(sym+add)@dtprel@l */

#define R_PPC64_DTPREL16_HIGHER	103 /* half16	(sym+add)@dtprel@higher */

#define R_PPC64_DTPREL16_HIGHERA 104 /* half16	(sym+add)@dtprel@highera */

#define R_PPC64_DTPREL16_HIGHEST 105 /* half16	(sym+add)@dtprel@highest */

#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16	(sym+add)@dtprel@highesta */



/* Keep this the last entry.  */

#define R_PPC64_NUM		107



/* There's actually a third entry here, but it's unused */

struct ppc64_opd_entry

{

	unsigned long funcaddr;

	unsigned long r2;

};



#ifdef  __KERNEL__



#ifdef CONFIG_SPU_BASE

/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
@@ -433,6 +136,4 @@ struct ppc64_opd_entry 


#endif /* CONFIG_SPU_BASE */



#endif /* __KERNEL */



#endif /* _ASM_POWERPC_ELF_H */

arch/powerpc/include/asm/kvm_para.h

+1 −69
Original line number Diff line number Diff line
@@ -16,77 +16,11 @@ 
 *

 * Authors: Hollis Blanchard <hollisb@us.ibm.com>

 */



#ifndef __POWERPC_KVM_PARA_H__

#define __POWERPC_KVM_PARA_H__



#include <linux/types.h>

#include <uapi/asm/kvm_para.h>



/*

 * Additions to this struct must only occur at the end, and should be

 * accompanied by a KVM_MAGIC_FEAT flag to advertise that they are present

 * (albeit not necessarily relevant to the current target hardware platform).

 *

 * Struct fields are always 32 or 64 bit aligned, depending on them being 32

 * or 64 bit wide respectively.

 *

 * See Documentation/virtual/kvm/ppc-pv.txt

 */

struct kvm_vcpu_arch_shared {

	__u64 scratch1;

	__u64 scratch2;

	__u64 scratch3;

	__u64 critical;		/* Guest may not get interrupts if == r1 */

	__u64 sprg0;

	__u64 sprg1;

	__u64 sprg2;

	__u64 sprg3;

	__u64 srr0;

	__u64 srr1;

	__u64 dar;		/* dear on BookE */

	__u64 msr;

	__u32 dsisr;

	__u32 int_pending;	/* Tells the guest if we have an interrupt */

	__u32 sr[16];

	__u32 mas0;

	__u32 mas1;

	__u64 mas7_3;

	__u64 mas2;

	__u32 mas4;

	__u32 mas6;

	__u32 esr;

	__u32 pir;



	/*

	 * SPRG4-7 are user-readable, so we can only keep these consistent

	 * between the shared area and the real registers when there's an

	 * intervening exit to KVM.  This also applies to SPRG3 on some

	 * chips.

	 *

	 * This suffices for access by guest userspace, since in PR-mode

	 * KVM, an exit must occur when changing the guest's MSR[PR].

	 * If the guest kernel writes to SPRG3-7 via the shared area, it

	 * must also use the shared area for reading while in kernel space.

	 */

	__u64 sprg4;

	__u64 sprg5;

	__u64 sprg6;

	__u64 sprg7;

};



#define KVM_SC_MAGIC_R0		0x4b564d21 /* "KVM!" */

#define HC_VENDOR_KVM		(42 << 16)

#define HC_EV_SUCCESS		0

#define HC_EV_UNIMPLEMENTED	12



#define KVM_FEATURE_MAGIC_PAGE	1



#define KVM_MAGIC_FEAT_SR		(1 << 0)



/* MASn, ESR, PIR, and high SPRGs */

#define KVM_MAGIC_FEAT_MAS0_TO_SPRG7	(1 << 1)



#ifdef __KERNEL__



#ifdef CONFIG_KVM_GUEST
@@ -211,6 +145,4 @@ static inline bool kvm_check_and_clear_guest_paused(void) 
	return false;

}



#endif /* __KERNEL__ */



#endif /* __POWERPC_KVM_PARA_H__ */