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Commit b5c62158 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: Use pci_resource functions for BARs. 



This was leftover crap from kill-agp. The current code is theoretically
broken for 64b bars. (I resist removing theoretically because I am too
lazy to test).

We still need to ioremap things ourselves because we want to ioremap_wc
the PTEs.

v2: Forgot to kill the tmp variable in v1

CC: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5774506f

drivers/gpu/drm/i915/i915_gem_gtt.c

+2 −6
Original line number Diff line number Diff line
@@ -609,7 +609,6 @@ int i915_gem_gtt_init(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	phys_addr_t gtt_bus_addr;

	u16 snb_gmch_ctl;

	u32 tmp;

	int ret;



	/* On modern platforms we need not worry ourself with the legacy
@@ -638,12 +637,9 @@ int i915_gem_gtt_init(struct drm_device *dev) 
	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))

		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));



	pci_read_config_dword(dev->pdev, PCI_BASE_ADDRESS_0, &tmp);

	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */

	gtt_bus_addr = (tmp & PCI_BASE_ADDRESS_MEM_MASK) + (2<<20);



	pci_read_config_dword(dev->pdev, PCI_BASE_ADDRESS_2, &tmp);

	dev_priv->mm.gtt->gma_bus_addr = tmp & PCI_BASE_ADDRESS_MEM_MASK;

	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);

	dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);



	/* i9xx_setup */

	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);