Loading arch/powerpc/kernel/vdso64/gettimeofday.S +2 −2 Original line number Diff line number Diff line Loading @@ -225,9 +225,9 @@ V_FUNCTION_BEGIN(__do_get_xsec) .cfi_startproc /* check for update count & load values */ 1: ld r8,CFG_TB_UPDATE_COUNT(r3) andi. r0,r4,1 /* pending update ? loop */ andi. r0,r8,1 /* pending update ? loop */ bne- 1b xor r0,r4,r4 /* create dependency */ xor r0,r8,r8 /* create dependency */ add r3,r3,r0 /* Get TB & offset it */ Loading arch/powerpc/mm/hash_utils_64.c +1 −1 Original line number Diff line number Diff line Loading @@ -169,7 +169,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, #ifdef CONFIG_PPC_ISERIES if (_machine == PLATFORM_ISERIES_LPAR) ret = iSeries_hpte_insert(hpteg, va, virt_to_abs(paddr), __pa(vaddr), tmp_mode, HPTE_V_BOLTED, psize); Loading arch/powerpc/platforms/pseries/eeh.c +14 −0 Original line number Diff line number Diff line Loading @@ -893,6 +893,20 @@ void eeh_add_device_tree_early(struct device_node *dn) } EXPORT_SYMBOL_GPL(eeh_add_device_tree_early); void eeh_add_device_tree_late(struct pci_bus *bus) { struct pci_dev *dev; list_for_each_entry(dev, &bus->devices, bus_list) { eeh_add_device_late(dev); if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { struct pci_bus *subbus = dev->subordinate; if (subbus) eeh_add_device_tree_late(subbus); } } } /** * eeh_add_device_late - perform EEH initialization for the indicated pci device * @dev: pci device for which to set up EEH Loading arch/powerpc/platforms/pseries/eeh_driver.c +1 −1 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ static inline const char * pcid_name (struct pci_dev *pdev) { if (pdev->dev.driver) if (pdev && pdev->dev.driver) return pdev->dev.driver->name; return ""; } Loading arch/powerpc/platforms/pseries/pci_dlpar.c +20 −16 Original line number Diff line number Diff line Loading @@ -106,6 +106,8 @@ pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus) } } } eeh_add_device_tree_late(bus); } EXPORT_SYMBOL_GPL(pcibios_fixup_new_pci_devices); Loading @@ -114,7 +116,6 @@ pcibios_pci_config_bridge(struct pci_dev *dev) { u8 sec_busno; struct pci_bus *child_bus; struct pci_dev *child_dev; /* Get busno of downstream bus */ pci_read_config_byte(dev, PCI_SECONDARY_BUS, &sec_busno); Loading @@ -129,10 +130,6 @@ pcibios_pci_config_bridge(struct pci_dev *dev) pci_scan_child_bus(child_bus); list_for_each_entry(child_dev, &child_bus->devices, bus_list) { eeh_add_device_late(child_dev); } /* Fixup new pci devices without touching bus struct */ pcibios_fixup_new_pci_devices(child_bus, 0); Loading Loading @@ -160,7 +157,15 @@ pcibios_add_pci_devices(struct pci_bus * bus) eeh_add_device_tree_early(dn); /* pci_scan_slot should find all children */ if (_machine == PLATFORM_PSERIES_LPAR) { /* use ofdt-based probe */ of_scan_bus(dn, bus); if (!list_empty(&bus->devices)) { pcibios_fixup_new_pci_devices(bus, 0); pci_bus_add_devices(bus); } } else { /* use legacy probe */ slotno = PCI_SLOT(PCI_DN(dn->child)->devfn); num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0)); if (num) { Loading @@ -168,8 +173,7 @@ pcibios_add_pci_devices(struct pci_bus * bus) pci_bus_add_devices(bus); } list_for_each_entry(dev, &bus->devices, bus_list) { eeh_add_device_late (dev); list_for_each_entry(dev, &bus->devices, bus_list) if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) pcibios_pci_config_bridge(dev); } Loading Loading
arch/powerpc/kernel/vdso64/gettimeofday.S +2 −2 Original line number Diff line number Diff line Loading @@ -225,9 +225,9 @@ V_FUNCTION_BEGIN(__do_get_xsec) .cfi_startproc /* check for update count & load values */ 1: ld r8,CFG_TB_UPDATE_COUNT(r3) andi. r0,r4,1 /* pending update ? loop */ andi. r0,r8,1 /* pending update ? loop */ bne- 1b xor r0,r4,r4 /* create dependency */ xor r0,r8,r8 /* create dependency */ add r3,r3,r0 /* Get TB & offset it */ Loading
arch/powerpc/mm/hash_utils_64.c +1 −1 Original line number Diff line number Diff line Loading @@ -169,7 +169,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, #ifdef CONFIG_PPC_ISERIES if (_machine == PLATFORM_ISERIES_LPAR) ret = iSeries_hpte_insert(hpteg, va, virt_to_abs(paddr), __pa(vaddr), tmp_mode, HPTE_V_BOLTED, psize); Loading
arch/powerpc/platforms/pseries/eeh.c +14 −0 Original line number Diff line number Diff line Loading @@ -893,6 +893,20 @@ void eeh_add_device_tree_early(struct device_node *dn) } EXPORT_SYMBOL_GPL(eeh_add_device_tree_early); void eeh_add_device_tree_late(struct pci_bus *bus) { struct pci_dev *dev; list_for_each_entry(dev, &bus->devices, bus_list) { eeh_add_device_late(dev); if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { struct pci_bus *subbus = dev->subordinate; if (subbus) eeh_add_device_tree_late(subbus); } } } /** * eeh_add_device_late - perform EEH initialization for the indicated pci device * @dev: pci device for which to set up EEH Loading
arch/powerpc/platforms/pseries/eeh_driver.c +1 −1 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ static inline const char * pcid_name (struct pci_dev *pdev) { if (pdev->dev.driver) if (pdev && pdev->dev.driver) return pdev->dev.driver->name; return ""; } Loading
arch/powerpc/platforms/pseries/pci_dlpar.c +20 −16 Original line number Diff line number Diff line Loading @@ -106,6 +106,8 @@ pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus) } } } eeh_add_device_tree_late(bus); } EXPORT_SYMBOL_GPL(pcibios_fixup_new_pci_devices); Loading @@ -114,7 +116,6 @@ pcibios_pci_config_bridge(struct pci_dev *dev) { u8 sec_busno; struct pci_bus *child_bus; struct pci_dev *child_dev; /* Get busno of downstream bus */ pci_read_config_byte(dev, PCI_SECONDARY_BUS, &sec_busno); Loading @@ -129,10 +130,6 @@ pcibios_pci_config_bridge(struct pci_dev *dev) pci_scan_child_bus(child_bus); list_for_each_entry(child_dev, &child_bus->devices, bus_list) { eeh_add_device_late(child_dev); } /* Fixup new pci devices without touching bus struct */ pcibios_fixup_new_pci_devices(child_bus, 0); Loading Loading @@ -160,7 +157,15 @@ pcibios_add_pci_devices(struct pci_bus * bus) eeh_add_device_tree_early(dn); /* pci_scan_slot should find all children */ if (_machine == PLATFORM_PSERIES_LPAR) { /* use ofdt-based probe */ of_scan_bus(dn, bus); if (!list_empty(&bus->devices)) { pcibios_fixup_new_pci_devices(bus, 0); pci_bus_add_devices(bus); } } else { /* use legacy probe */ slotno = PCI_SLOT(PCI_DN(dn->child)->devfn); num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0)); if (num) { Loading @@ -168,8 +173,7 @@ pcibios_add_pci_devices(struct pci_bus * bus) pci_bus_add_devices(bus); } list_for_each_entry(dev, &bus->devices, bus_list) { eeh_add_device_late (dev); list_for_each_entry(dev, &bus->devices, bus_list) if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) pcibios_pci_config_bridge(dev); } Loading