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Commit b453de02 authored by Hans Rosenfeld's avatar Hans Rosenfeld Committed by Ingo Molnar
Browse files

x86, amd: Enable L3 cache index disable on family 0x15 



AMD family 0x15 CPUs support L3 cache index disable, so enable
it on them.

Signed-off-by: default avatarHans Rosenfeld <hans.rosenfeld@amd.com>
Cc: <andreas.herrmann3@amd.com>
LKML-Reference: <1295881543-572552-3-git-send-email-hans.rosenfeld@amd.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent d518573d

arch/x86/kernel/amd_nb.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -85,6 +85,9 @@ int amd_cache_northbridges(void) 
	     boot_cpu_data.x86_mask >= 0x1))

	     boot_cpu_data.x86_mask >= 0x1))

		amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE;

		amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE;





	if (boot_cpu_data.x86 == 0x15)

		amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE;



	return 0;

	return 0;

}

}

EXPORT_SYMBOL_GPL(amd_cache_northbridges);

EXPORT_SYMBOL_GPL(amd_cache_northbridges);