Commit b44f4eea authored Feb 05, 2016 by Susheel Khiani

ARM: dts: msm: Enable static-cb and no-smr-check for msmtitanium



static-cb option enables us to use pre-defined
static context bank allocation programmed by TZ.
Global registers are configured by TZ before
kernel comes up and this programming is not altered
throughout the life of system.

When an SMMU probes we do a sanity check on the
SMR registers. This check can cause problem when
we enable stati-cb option as SMRs would already
be programmed by TZ. So enable no-smr-check to
skip doing this sanity check.

Change-Id: Icb61c482f7ca56f9041094cd150e9fc1fa2986ba
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>

parent 753b4916

arch/arm/boot/dts/qcom/msm-arm-smmu-titanium.dtsi

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -27,6 +27,8 @@
	qcom,skip-init;		qcom,skip-init;
	qcom,dynamic;		qcom,dynamic;
	qcom,enable-smmu-halt;		qcom,enable-smmu-halt;
			qcom,enable-static-cb;
			qcom,no-smr-check;
	vdd-supply = <&gdsc_oxili_cx>;		vdd-supply = <&gdsc_oxili_cx>;
	clocks = <&clock_gcc_gfx clk_gcc_oxili_ahb_clk>,		clocks = <&clock_gcc_gfx clk_gcc_oxili_ahb_clk>,
	<&clock_gcc_gfx clk_gcc_bimc_gfx_clk>;		<&clock_gcc_gfx clk_gcc_bimc_gfx_clk>;