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Commit b3bf0766 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: implement WaMbcDriverBootEnable on Haswell 



Also document the WA name for the previous gens that implement it.

Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d567b07f

drivers/gpu/drm/i915/intel_pm.c

+7 −0
Original line number Diff line number Diff line
@@ -3519,6 +3519,7 @@ static void gen6_init_clock_gating(struct drm_device *dev) 
		   ILK_DPARBUNIT_CLOCK_GATE_ENABLE  |

		   ILK_DPFDUNIT_CLOCK_GATE_ENABLE);



	/* WaMbcDriverBootEnable */

	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |

		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
@@ -3605,6 +3606,10 @@ static void haswell_init_clock_gating(struct drm_device *dev) 
	I915_WRITE(CACHE_MODE_1,

		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));



	/* WaMbcDriverBootEnable */

	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |

		   GEN6_MBCTL_ENABLE_BOOT_FETCH);



	/* XXX: This is a workaround for early silicon revisions and should be

	 * removed later.

	 */
@@ -3696,6 +3701,7 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) 
		intel_flush_display_plane(dev_priv, pipe);

	}



	/* WaMbcDriverBootEnable */

	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |

		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
@@ -3761,6 +3767,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev) 
		   I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |

		   GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);



	/* WaMbcDriverBootEnable */

	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |

		   GEN6_MBCTL_ENABLE_BOOT_FETCH);