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Commit b36ece83 authored Oct 12, 2010 by Mingkai Hu Committed by Grant Likely Oct 12, 2010

spi/mpc8xxx: refactor the common code for SPI/eSPI controller



Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used
by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI
controller code in the SPI controller driver spi_fsl_spi.c.

Because the register map of the SPI controller and eSPI controller
is so different, also leave the code operated the register to the
driver code, not the common code.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

parent 3272029f

drivers/spi/Kconfig

+5 −0

Original line number	Diff line number	Diff line
		@@ -182,9 +182,14 @@ config SPI_MPC512x_PSC
		This enables using the Freescale MPC5121 Programmable Serial
		Controller in SPI master mode.

		config SPI_FSL_LIB
		tristate
		depends on FSL_SOC

		config SPI_FSL_SPI
		tristate "Freescale SPI controller"
		depends on FSL_SOC
		select SPI_FSL_LIB
		help
		This enables using the Freescale SPI controllers in master mode.
		MPC83xx platform uses the controller in cpu mode or CPM/QE mode.

drivers/spi/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,7 @@ obj-$(CONFIG_SPI_PL022) += amba-pl022.o
		obj-$(CONFIG_SPI_MPC512x_PSC) += mpc512x_psc_spi.o
		obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
		obj-$(CONFIG_SPI_MPC52xx) += mpc52xx_spi.o
		obj-$(CONFIG_SPI_FSL_LIB) += spi_fsl_lib.o
		obj-$(CONFIG_SPI_FSL_SPI) += spi_fsl_spi.o
		obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o
		obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o

drivers/spi/spi_fsl_lib.c

0 → 100644

+237 −0

Original line number	Diff line number	Diff line
		/*
		* Freescale SPI/eSPI controller driver library.
		*
		* Maintainer: Kumar Gala
		*
		* Copyright (C) 2006 Polycom, Inc.
		*
		* CPM SPI and QE buffer descriptors mode support:
		* Copyright (c) 2009 MontaVista Software, Inc.
		* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
		*
		* Copyright 2010 Freescale Semiconductor, Inc.
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License as published by the
		* Free Software Foundation; either version 2 of the License, or (at your
		* option) any later version.
		*/
		#include <linux/kernel.h>
		#include <linux/interrupt.h>
		#include <linux/fsl_devices.h>
		#include <linux/dma-mapping.h>
		#include <linux/mm.h>
		#include <linux/of_platform.h>
		#include <linux/of_spi.h>
		#include <sysdev/fsl_soc.h>

		#include "spi_fsl_lib.h"

		#define MPC8XXX_SPI_RX_BUF(type) \
		void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
		{ \
		type *rx = mpc8xxx_spi->rx; \
		*rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
		mpc8xxx_spi->rx = rx; \
		}

		#define MPC8XXX_SPI_TX_BUF(type) \
		u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
		{ \
		u32 data; \
		const type *tx = mpc8xxx_spi->tx; \
		if (!tx) \
		return 0; \
		data = *tx++ << mpc8xxx_spi->tx_shift; \
		mpc8xxx_spi->tx = tx; \
		return data; \
		}

		MPC8XXX_SPI_RX_BUF(u8)
		MPC8XXX_SPI_RX_BUF(u16)
		MPC8XXX_SPI_RX_BUF(u32)
		MPC8XXX_SPI_TX_BUF(u8)
		MPC8XXX_SPI_TX_BUF(u16)
		MPC8XXX_SPI_TX_BUF(u32)

		struct mpc8xxx_spi_probe_info to_of_pinfo(struct fsl_spi_platform_data pdata)
		{
		return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
		}

		void mpc8xxx_spi_work(struct work_struct *work)
		{
		struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
		work);

		spin_lock_irq(&mpc8xxx_spi->lock);
		while (!list_empty(&mpc8xxx_spi->queue)) {
		struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
		struct spi_message, queue);

		list_del_init(&m->queue);
		spin_unlock_irq(&mpc8xxx_spi->lock);

		if (mpc8xxx_spi->spi_do_one_msg)
		mpc8xxx_spi->spi_do_one_msg(m);

		spin_lock_irq(&mpc8xxx_spi->lock);
		}
		spin_unlock_irq(&mpc8xxx_spi->lock);
		}

		int mpc8xxx_spi_transfer(struct spi_device *spi,
		struct spi_message *m)
		{
		struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
		unsigned long flags;

		m->actual_length = 0;
		m->status = -EINPROGRESS;

		spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
		list_add_tail(&m->queue, &mpc8xxx_spi->queue);
		queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
		spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);

		return 0;
		}

		void mpc8xxx_spi_cleanup(struct spi_device *spi)
		{
		kfree(spi->controller_state);
		}

		const char *mpc8xxx_spi_strmode(unsigned int flags)
		{
		if (flags & SPI_QE_CPU_MODE) {
		return "QE CPU";
		} else if (flags & SPI_CPM_MODE) {
		if (flags & SPI_QE)
		return "QE";
		else if (flags & SPI_CPM2)
		return "CPM2";
		else
		return "CPM1";
		}
		return "CPU";
		}

		int mpc8xxx_spi_probe(struct device dev, struct resource mem,
		unsigned int irq)
		{
		struct fsl_spi_platform_data *pdata = dev->platform_data;
		struct spi_master *master;
		struct mpc8xxx_spi *mpc8xxx_spi;
		int ret = 0;

		master = dev_get_drvdata(dev);

		/* the spi->mode bits understood by this driver: */
		master->mode_bits = SPI_CPOL \| SPI_CPHA \| SPI_CS_HIGH
		\| SPI_LSB_FIRST \| SPI_LOOP;

		master->transfer = mpc8xxx_spi_transfer;
		master->cleanup = mpc8xxx_spi_cleanup;
		master->dev.of_node = dev->of_node;

		mpc8xxx_spi = spi_master_get_devdata(master);
		mpc8xxx_spi->dev = dev;
		mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
		mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
		mpc8xxx_spi->flags = pdata->flags;
		mpc8xxx_spi->spibrg = pdata->sysclk;
		mpc8xxx_spi->irq = irq;

		mpc8xxx_spi->rx_shift = 0;
		mpc8xxx_spi->tx_shift = 0;

		init_completion(&mpc8xxx_spi->done);

		master->bus_num = pdata->bus_num;
		master->num_chipselect = pdata->max_chipselect;

		spin_lock_init(&mpc8xxx_spi->lock);
		init_completion(&mpc8xxx_spi->done);
		INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
		INIT_LIST_HEAD(&mpc8xxx_spi->queue);

		mpc8xxx_spi->workqueue = create_singlethread_workqueue(
		dev_name(master->dev.parent));
		if (mpc8xxx_spi->workqueue == NULL) {
		ret = -EBUSY;
		goto err;
		}

		return 0;

		err:
		return ret;
		}

		int __devexit mpc8xxx_spi_remove(struct device *dev)
		{
		struct mpc8xxx_spi *mpc8xxx_spi;
		struct spi_master *master;

		master = dev_get_drvdata(dev);
		mpc8xxx_spi = spi_master_get_devdata(master);

		flush_workqueue(mpc8xxx_spi->workqueue);
		destroy_workqueue(mpc8xxx_spi->workqueue);
		spi_unregister_master(master);

		free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);

		if (mpc8xxx_spi->spi_remove)
		mpc8xxx_spi->spi_remove(mpc8xxx_spi);

		return 0;
		}

		int __devinit of_mpc8xxx_spi_probe(struct platform_device *ofdev,
		const struct of_device_id *ofid)
		{
		struct device *dev = &ofdev->dev;
		struct device_node *np = ofdev->dev.of_node;
		struct mpc8xxx_spi_probe_info *pinfo;
		struct fsl_spi_platform_data *pdata;
		const void *prop;
		int ret = -ENOMEM;

		pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL);
		if (!pinfo)
		return -ENOMEM;

		pdata = &pinfo->pdata;
		dev->platform_data = pdata;

		/* Allocate bus num dynamically. */
		pdata->bus_num = -1;

		/* SPI controller is either clocked from QE or SoC clock. */
		pdata->sysclk = get_brgfreq();
		if (pdata->sysclk == -1) {
		pdata->sysclk = fsl_get_sys_freq();
		if (pdata->sysclk == -1) {
		ret = -ENODEV;
		goto err;
		}
		}

		prop = of_get_property(np, "mode", NULL);
		if (prop && !strcmp(prop, "cpu-qe"))
		pdata->flags = SPI_QE_CPU_MODE;
		else if (prop && !strcmp(prop, "qe"))
		pdata->flags = SPI_CPM_MODE \| SPI_QE;
		else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
		pdata->flags = SPI_CPM_MODE \| SPI_CPM2;
		else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
		pdata->flags = SPI_CPM_MODE \| SPI_CPM1;

		return 0;

		err:
		kfree(pinfo);
		return ret;
		}

drivers/spi/spi_fsl_lib.h

0 → 100644

+119 −0

Original line number	Diff line number	Diff line
		/*
		* Freescale SPI/eSPI controller driver library.
		*
		* Maintainer: Kumar Gala
		*
		* Copyright 2010 Freescale Semiconductor, Inc.
		* Copyright (C) 2006 Polycom, Inc.
		*
		* CPM SPI and QE buffer descriptors mode support:
		* Copyright (c) 2009 MontaVista Software, Inc.
		* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License as published by the
		* Free Software Foundation; either version 2 of the License, or (at your
		* option) any later version.
		*/
		#ifndef __SPI_FSL_LIB_H__
		#define __SPI_FSL_LIB_H__

		/* SPI/eSPI Controller driver's private data. */
		struct mpc8xxx_spi {
		struct device *dev;
		void *reg_base;

		/* rx & tx bufs from the spi_transfer */
		const void *tx;
		void *rx;

		int subblock;
		struct spi_pram __iomem *pram;
		struct cpm_buf_desc __iomem *tx_bd;
		struct cpm_buf_desc __iomem *rx_bd;

		struct spi_transfer *xfer_in_progress;

		/* dma addresses for CPM transfers */
		dma_addr_t tx_dma;
		dma_addr_t rx_dma;
		bool map_tx_dma;
		bool map_rx_dma;

		dma_addr_t dma_dummy_tx;
		dma_addr_t dma_dummy_rx;

		/* functions to deal with different sized buffers */
		void (get_rx) (u32 rx_data, struct mpc8xxx_spi );
		u32(get_tx) (struct mpc8xxx_spi );

		/* hooks for different controller driver */
		void (spi_do_one_msg) (struct spi_message m);
		void (spi_remove) (struct mpc8xxx_spi mspi);

		unsigned int count;
		unsigned int irq;

		unsigned nsecs; /* (clock cycle time)/2 */

		u32 spibrg; /* SPIBRG input clock */
		u32 rx_shift; /* RX data reg shift when in qe mode */
		u32 tx_shift; /* TX data reg shift when in qe mode */

		unsigned int flags;

		struct workqueue_struct *workqueue;
		struct work_struct work;

		struct list_head queue;
		spinlock_t lock;

		struct completion done;
		};

		struct spi_mpc8xxx_cs {
		/* functions to deal with different sized buffers */
		void (get_rx) (u32 rx_data, struct mpc8xxx_spi );
		u32 (get_tx) (struct mpc8xxx_spi );
		u32 rx_shift; /* RX data reg shift when in qe mode */
		u32 tx_shift; /* TX data reg shift when in qe mode */
		u32 hw_mode; /* Holds HW mode register settings */
		};

		static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
		{
		out_be32(reg, val);
		}

		static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
		{
		return in_be32(reg);
		}

		struct mpc8xxx_spi_probe_info {
		struct fsl_spi_platform_data pdata;
		int *gpios;
		bool *alow_flags;
		};

		extern u32 mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi *mpc8xxx_spi);
		extern u32 mpc8xxx_spi_tx_buf_u16(struct mpc8xxx_spi *mpc8xxx_spi);
		extern u32 mpc8xxx_spi_tx_buf_u32(struct mpc8xxx_spi *mpc8xxx_spi);
		extern void mpc8xxx_spi_rx_buf_u8(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
		extern void mpc8xxx_spi_rx_buf_u16(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
		extern void mpc8xxx_spi_rx_buf_u32(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);

		extern struct mpc8xxx_spi_probe_info *to_of_pinfo(
		struct fsl_spi_platform_data *pdata);
		extern int mpc8xxx_spi_bufs(struct mpc8xxx_spi *mspi,
		struct spi_transfer *t, unsigned int len);
		extern int mpc8xxx_spi_transfer(struct spi_device spi, struct spi_message m);
		extern void mpc8xxx_spi_cleanup(struct spi_device *spi);
		extern const char *mpc8xxx_spi_strmode(unsigned int flags);
		extern int mpc8xxx_spi_probe(struct device dev, struct resource mem,
		unsigned int irq);
		extern int mpc8xxx_spi_remove(struct device *dev);
		extern int of_mpc8xxx_spi_probe(struct platform_device *ofdev,
		const struct of_device_id *ofid);

		#endif /* __SPI_FSL_LIB_H__ */

drivers/spi/spi_fsl_spi.c

+160 −392

File changed.

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