Loading drivers/mmc/core/mmc.c +1 −1 Original line number Diff line number Diff line Loading @@ -1580,7 +1580,7 @@ static int mmc_change_bus_speed(struct mmc_host *host, unsigned long *freq) * for other timings we can simply do clock frequency change */ if (mmc_card_hs400(card) || (*freq == MMC_HS200_MAX_DTR)) { (!mmc_card_hs200(host->card) && *freq == MMC_HS200_MAX_DTR)) { err = mmc_set_clock_bus_speed(card, *freq); if (err) { pr_err("%s: %s: failed (%d)to set bus and clock speed (freq=%lu)\n", Loading drivers/mmc/host/cmdq_hci.c +4 −2 Original line number Diff line number Diff line Loading @@ -730,8 +730,6 @@ static int cmdq_request(struct mmc_host *mmc, struct mmc_request *mrq) } cq_host->mrq_slot[tag] = mrq; if (cq_host->ops->set_tranfer_params) cq_host->ops->set_tranfer_params(mmc); /* PM QoS */ sdhci_msm_pm_qos_irq_vote(host); Loading Loading @@ -998,6 +996,10 @@ static int cmdq_halt(struct mmc_host *mmc, bool halt) } ret = retries ? 0 : -ETIMEDOUT; } else { if (cq_host->ops->set_transfer_params) cq_host->ops->set_transfer_params(mmc); if (cq_host->ops->set_block_size) cq_host->ops->set_block_size(mmc); if (cq_host->ops->set_data_timeout) cq_host->ops->set_data_timeout(mmc, 0xf); if (cq_host->ops->clear_set_irqs) Loading drivers/mmc/host/cmdq_hci.h +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -197,7 +197,7 @@ struct cmdq_host { }; struct cmdq_host_ops { void (*set_tranfer_params)(struct mmc_host *mmc); void (*set_transfer_params)(struct mmc_host *mmc); void (*set_data_timeout)(struct mmc_host *mmc, u32 val); void (*clear_set_irqs)(struct mmc_host *mmc, bool clear); void (*set_block_size)(struct mmc_host *mmc); Loading drivers/mmc/host/sdhci-msm.c +2 −0 Original line number Diff line number Diff line Loading @@ -4155,6 +4155,8 @@ static int sdhci_msm_probe(struct platform_device *pdev) host->quirks2 |= SDHCI_QUIRK2_IGNORE_DATATOUT_FOR_R1BCMD; host->quirks2 |= SDHCI_QUIRK2_BROKEN_PRESET_VALUE; host->quirks2 |= SDHCI_QUIRK2_USE_RESERVED_MAX_TIMEOUT; host->quirks2 |= SDHCI_QUIRK2_NON_STANDARD_TUNING; host->quirks2 |= SDHCI_QUIRK2_USE_PIO_FOR_EMMC_TUNING; if (host->quirks2 & SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK) host->quirks2 |= SDHCI_QUIRK2_DIVIDE_TOUT_BY_4; Loading drivers/mmc/host/sdhci.c +28 −2 Original line number Diff line number Diff line Loading @@ -897,6 +897,10 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) host->flags |= SDHCI_REQ_USE_DMA; if ((host->quirks2 & SDHCI_QUIRK2_USE_PIO_FOR_EMMC_TUNING) && cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) host->flags &= ~SDHCI_REQ_USE_DMA; /* * FIXME: This doesn't account for merging when mapping the * scatterlist. Loading Loading @@ -2927,8 +2931,9 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) /* CMD19 generates _only_ Buffer Read Ready interrupt */ if (intmask & SDHCI_INT_DATA_AVAIL) { if (command == MMC_SEND_TUNING_BLOCK || command == MMC_SEND_TUNING_BLOCK_HS200) { if (!(host->quirks2 & SDHCI_QUIRK2_NON_STANDARD_TUNING) && (command == MMC_SEND_TUNING_BLOCK || command == MMC_SEND_TUNING_BLOCK_HS200)) { host->tuning_done = 1; wake_up(&host->buf_ready_int); return; Loading Loading @@ -3539,6 +3544,22 @@ static int sdhci_is_adma2_64bit(struct sdhci_host *host) #endif #ifdef CONFIG_MMC_CQ_HCI static void sdhci_cmdq_set_transfer_params(struct mmc_host *mmc) { struct sdhci_host *host = mmc_priv(mmc); u8 ctrl; if (host->version >= SDHCI_SPEC_200) { ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); ctrl &= ~SDHCI_CTRL_DMA_MASK; if (host->flags & SDHCI_USE_ADMA_64BIT) ctrl |= SDHCI_CTRL_ADMA64; else ctrl |= SDHCI_CTRL_ADMA32; sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); } } static void sdhci_cmdq_clear_set_irqs(struct mmc_host *mmc, bool clear) { struct sdhci_host *host = mmc_priv(mmc); Loading Loading @@ -3635,6 +3656,10 @@ static void sdhci_cmdq_post_cqe_halt(struct mmc_host *mmc) sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS); } #else static void sdhci_cmdq_set_transfer_params(struct mmc_host *mmc) { } static void sdhci_cmdq_clear_set_irqs(struct mmc_host *mmc, bool clear) { Loading Loading @@ -3695,6 +3720,7 @@ static const struct cmdq_host_ops sdhci_cmdq_ops = { .crypto_cfg = sdhci_cmdq_crypto_cfg, .crypto_cfg_reset = sdhci_cmdq_crypto_cfg_reset, .post_cqe_halt = sdhci_cmdq_post_cqe_halt, .set_transfer_params = sdhci_cmdq_set_transfer_params, }; int sdhci_add_host(struct sdhci_host *host) Loading Loading
drivers/mmc/core/mmc.c +1 −1 Original line number Diff line number Diff line Loading @@ -1580,7 +1580,7 @@ static int mmc_change_bus_speed(struct mmc_host *host, unsigned long *freq) * for other timings we can simply do clock frequency change */ if (mmc_card_hs400(card) || (*freq == MMC_HS200_MAX_DTR)) { (!mmc_card_hs200(host->card) && *freq == MMC_HS200_MAX_DTR)) { err = mmc_set_clock_bus_speed(card, *freq); if (err) { pr_err("%s: %s: failed (%d)to set bus and clock speed (freq=%lu)\n", Loading
drivers/mmc/host/cmdq_hci.c +4 −2 Original line number Diff line number Diff line Loading @@ -730,8 +730,6 @@ static int cmdq_request(struct mmc_host *mmc, struct mmc_request *mrq) } cq_host->mrq_slot[tag] = mrq; if (cq_host->ops->set_tranfer_params) cq_host->ops->set_tranfer_params(mmc); /* PM QoS */ sdhci_msm_pm_qos_irq_vote(host); Loading Loading @@ -998,6 +996,10 @@ static int cmdq_halt(struct mmc_host *mmc, bool halt) } ret = retries ? 0 : -ETIMEDOUT; } else { if (cq_host->ops->set_transfer_params) cq_host->ops->set_transfer_params(mmc); if (cq_host->ops->set_block_size) cq_host->ops->set_block_size(mmc); if (cq_host->ops->set_data_timeout) cq_host->ops->set_data_timeout(mmc, 0xf); if (cq_host->ops->clear_set_irqs) Loading
drivers/mmc/host/cmdq_hci.h +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -197,7 +197,7 @@ struct cmdq_host { }; struct cmdq_host_ops { void (*set_tranfer_params)(struct mmc_host *mmc); void (*set_transfer_params)(struct mmc_host *mmc); void (*set_data_timeout)(struct mmc_host *mmc, u32 val); void (*clear_set_irqs)(struct mmc_host *mmc, bool clear); void (*set_block_size)(struct mmc_host *mmc); Loading
drivers/mmc/host/sdhci-msm.c +2 −0 Original line number Diff line number Diff line Loading @@ -4155,6 +4155,8 @@ static int sdhci_msm_probe(struct platform_device *pdev) host->quirks2 |= SDHCI_QUIRK2_IGNORE_DATATOUT_FOR_R1BCMD; host->quirks2 |= SDHCI_QUIRK2_BROKEN_PRESET_VALUE; host->quirks2 |= SDHCI_QUIRK2_USE_RESERVED_MAX_TIMEOUT; host->quirks2 |= SDHCI_QUIRK2_NON_STANDARD_TUNING; host->quirks2 |= SDHCI_QUIRK2_USE_PIO_FOR_EMMC_TUNING; if (host->quirks2 & SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK) host->quirks2 |= SDHCI_QUIRK2_DIVIDE_TOUT_BY_4; Loading
drivers/mmc/host/sdhci.c +28 −2 Original line number Diff line number Diff line Loading @@ -897,6 +897,10 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) host->flags |= SDHCI_REQ_USE_DMA; if ((host->quirks2 & SDHCI_QUIRK2_USE_PIO_FOR_EMMC_TUNING) && cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) host->flags &= ~SDHCI_REQ_USE_DMA; /* * FIXME: This doesn't account for merging when mapping the * scatterlist. Loading Loading @@ -2927,8 +2931,9 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) /* CMD19 generates _only_ Buffer Read Ready interrupt */ if (intmask & SDHCI_INT_DATA_AVAIL) { if (command == MMC_SEND_TUNING_BLOCK || command == MMC_SEND_TUNING_BLOCK_HS200) { if (!(host->quirks2 & SDHCI_QUIRK2_NON_STANDARD_TUNING) && (command == MMC_SEND_TUNING_BLOCK || command == MMC_SEND_TUNING_BLOCK_HS200)) { host->tuning_done = 1; wake_up(&host->buf_ready_int); return; Loading Loading @@ -3539,6 +3544,22 @@ static int sdhci_is_adma2_64bit(struct sdhci_host *host) #endif #ifdef CONFIG_MMC_CQ_HCI static void sdhci_cmdq_set_transfer_params(struct mmc_host *mmc) { struct sdhci_host *host = mmc_priv(mmc); u8 ctrl; if (host->version >= SDHCI_SPEC_200) { ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); ctrl &= ~SDHCI_CTRL_DMA_MASK; if (host->flags & SDHCI_USE_ADMA_64BIT) ctrl |= SDHCI_CTRL_ADMA64; else ctrl |= SDHCI_CTRL_ADMA32; sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); } } static void sdhci_cmdq_clear_set_irqs(struct mmc_host *mmc, bool clear) { struct sdhci_host *host = mmc_priv(mmc); Loading Loading @@ -3635,6 +3656,10 @@ static void sdhci_cmdq_post_cqe_halt(struct mmc_host *mmc) sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS); } #else static void sdhci_cmdq_set_transfer_params(struct mmc_host *mmc) { } static void sdhci_cmdq_clear_set_irqs(struct mmc_host *mmc, bool clear) { Loading Loading @@ -3695,6 +3720,7 @@ static const struct cmdq_host_ops sdhci_cmdq_ops = { .crypto_cfg = sdhci_cmdq_crypto_cfg, .crypto_cfg_reset = sdhci_cmdq_crypto_cfg_reset, .post_cqe_halt = sdhci_cmdq_post_cqe_halt, .set_transfer_params = sdhci_cmdq_set_transfer_params, }; int sdhci_add_host(struct sdhci_host *host) Loading