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Commit b27d515a authored by Stephane Eranian's avatar Stephane Eranian Committed by Ingo Molnar
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perf: x86: Add support for the ANY bit 



Propagate the ANY bit into the fixed counter config for v3 and higher.

Signed-off-by: default avatarStephane Eranian <eranian@google.com>
[a.p.zijlstra@chello.nl: split from larger patch]
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <4b5430c6.0f975e0a.1bf9.ffff85fe@mx.google.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 92b67598

arch/x86/include/asm/perf_event.h

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#define MSR_ARCH_PERFMON_EVENTSEL1			     0x187



#define ARCH_PERFMON_EVENTSEL0_ENABLE			  (1 << 22)

#define ARCH_PERFMON_EVENTSEL_ANY			  (1 << 21)

#define ARCH_PERFMON_EVENTSEL_INT			  (1 << 20)

#define ARCH_PERFMON_EVENTSEL_OS			  (1 << 17)

#define ARCH_PERFMON_EVENTSEL_USR			  (1 << 16)

arch/x86/kernel/cpu/perf_event.c

+7 −0
Original line number Diff line number Diff line
@@ -1343,6 +1343,13 @@ intel_pmu_enable_fixed(struct hw_perf_event *hwc, int __idx) 
		bits |= 0x2;

	if (hwc->config & ARCH_PERFMON_EVENTSEL_OS)

		bits |= 0x1;



	/*

	 * ANY bit is supported in v3 and up

	 */

	if (x86_pmu.version > 2 && hwc->config & ARCH_PERFMON_EVENTSEL_ANY)

		bits |= 0x4;



	bits <<= (idx * 4);

	mask = 0xfULL << (idx * 4);