Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b23f46c7 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc 

* 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: split omap2/3/4_check_revision function
  ARM: OMAP2+: Make cpu_rev static global variable
parents abf45ce8 5405520d

arch/arm/mach-omap2/id.c

+78 −108
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ 
#include "control.h"



static unsigned int omap_revision;



static const char *cpu_rev;

u32 omap_features;



unsigned int omap_rev(void)
@@ -112,7 +112,7 @@ void omap_get_die_id(struct omap_die_id *odi) 
	odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);

}



static void __init omap24xx_check_revision(void)

void __init omap2xxx_check_revision(void)

{

	int i, j;

	u32 idcode, prod_id;
@@ -166,13 +166,63 @@ static void __init omap24xx_check_revision(void) 
	pr_info("\n");

}



#define OMAP3_SHOW_FEATURE(feat)		\

	if (omap3_has_ ##feat())		\

		printk(#feat" ");



static void __init omap3_cpuinfo(void)

{

	const char *cpu_name;



	/*

	 * OMAP3430 and OMAP3530 are assumed to be same.

	 *

	 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based

	 * on available features. Upon detection, update the CPU id

	 * and CPU class bits.

	 */

	if (cpu_is_omap3630()) {

		cpu_name = "OMAP3630";

	} else if (cpu_is_omap3517()) {

		/* AM35xx devices */

		cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";

	} else if (cpu_is_ti816x()) {

		cpu_name = "TI816X";

	} else if (cpu_is_am335x()) {

		cpu_name =  "AM335X";

	} else if (cpu_is_ti814x()) {

		cpu_name = "TI814X";

	} else if (omap3_has_iva() && omap3_has_sgx()) {

		/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */

		cpu_name = "OMAP3430/3530";

	} else if (omap3_has_iva()) {

		cpu_name = "OMAP3525";

	} else if (omap3_has_sgx()) {

		cpu_name = "OMAP3515";

	} else {

		cpu_name = "OMAP3503";

	}



	/* Print verbose information */

	pr_info("%s ES%s (", cpu_name, cpu_rev);



	OMAP3_SHOW_FEATURE(l2cache);

	OMAP3_SHOW_FEATURE(iva);

	OMAP3_SHOW_FEATURE(sgx);

	OMAP3_SHOW_FEATURE(neon);

	OMAP3_SHOW_FEATURE(isp);

	OMAP3_SHOW_FEATURE(192mhz_clk);



	printk(")\n");

}



#define OMAP3_CHECK_FEATURE(status,feat)				\

	if (((status & OMAP3_ ##feat## _MASK) 				\

		>> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { 	\

		omap_features |= OMAP3_HAS_ ##feat;			\

	}



static void __init omap3_check_features(void)

void __init omap3xxx_check_features(void)

{

	u32 status;
@@ -199,9 +249,11 @@ static void __init omap3_check_features(void) 
	 * TODO: Get additional info (where applicable)

	 *       e.g. Size of L2 cache.

	 */



	omap3_cpuinfo();

}



static void __init omap4_check_features(void)

void __init omap4xxx_check_features(void)

{

	u32 si_type;
@@ -226,12 +278,13 @@ static void __init omap4_check_features(void) 
	}

}



static void __init ti81xx_check_features(void)

void __init ti81xx_check_features(void)

{

	omap_features = OMAP3_HAS_NEON;

	omap3_cpuinfo();

}



static void __init omap3_check_revision(const char **cpu_rev)

void __init omap3xxx_check_revision(void)

{

	u32 cpuid, idcode;

	u16 hawkeye;
@@ -245,7 +298,7 @@ static void __init omap3_check_revision(const char **cpu_rev) 
	cpuid = read_cpuid(CPUID_ID);

	if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {

		omap_revision = OMAP3430_REV_ES1_0;

		*cpu_rev = "1.0";

		cpu_rev = "1.0";

		return;

	}
@@ -266,26 +319,26 @@ static void __init omap3_check_revision(const char **cpu_rev) 
		case 0: /* Take care of early samples */

		case 1:

			omap_revision = OMAP3430_REV_ES2_0;

			*cpu_rev = "2.0";

			cpu_rev = "2.0";

			break;

		case 2:

			omap_revision = OMAP3430_REV_ES2_1;

			*cpu_rev = "2.1";

			cpu_rev = "2.1";

			break;

		case 3:

			omap_revision = OMAP3430_REV_ES3_0;

			*cpu_rev = "3.0";

			cpu_rev = "3.0";

			break;

		case 4:

			omap_revision = OMAP3430_REV_ES3_1;

			*cpu_rev = "3.1";

			cpu_rev = "3.1";

			break;

		case 7:

		/* FALLTHROUGH */

		default:

			/* Use the latest known revision as default */

			omap_revision = OMAP3430_REV_ES3_1_2;

			*cpu_rev = "3.1.2";

			cpu_rev = "3.1.2";

		}

		break;

	case 0xb868:
@@ -298,13 +351,13 @@ static void __init omap3_check_revision(const char **cpu_rev) 
		switch (rev) {

		case 0:

			omap_revision = OMAP3517_REV_ES1_0;

			*cpu_rev = "1.0";

			cpu_rev = "1.0";

			break;

		case 1:

		/* FALLTHROUGH */

		default:

			omap_revision = OMAP3517_REV_ES1_1;

			*cpu_rev = "1.1";

			cpu_rev = "1.1";

		}

		break;

	case 0xb891:
@@ -313,65 +366,65 @@ static void __init omap3_check_revision(const char **cpu_rev) 
		switch(rev) {

		case 0: /* Take care of early samples */

			omap_revision = OMAP3630_REV_ES1_0;

			*cpu_rev = "1.0";

			cpu_rev = "1.0";

			break;

		case 1:

			omap_revision = OMAP3630_REV_ES1_1;

			*cpu_rev = "1.1";

			cpu_rev = "1.1";

			break;

		case 2:

		/* FALLTHROUGH */

		default:

			omap_revision = OMAP3630_REV_ES1_2;

			*cpu_rev = "1.2";

			cpu_rev = "1.2";

		}

		break;

	case 0xb81e:

		switch (rev) {

		case 0:

			omap_revision = TI8168_REV_ES1_0;

			*cpu_rev = "1.0";

			cpu_rev = "1.0";

			break;

		case 1:

		/* FALLTHROUGH */

		default:

			omap_revision = TI8168_REV_ES1_1;

			*cpu_rev = "1.1";

			cpu_rev = "1.1";

			break;

		}

		break;

	case 0xb944:

		omap_revision = AM335X_REV_ES1_0;

		*cpu_rev = "1.0";

		cpu_rev = "1.0";

	case 0xb8f2:

		switch (rev) {

		case 0:

		/* FALLTHROUGH */

		case 1:

			omap_revision = TI8148_REV_ES1_0;

			*cpu_rev = "1.0";

			cpu_rev = "1.0";

			break;

		case 2:

			omap_revision = TI8148_REV_ES2_0;

			*cpu_rev = "2.0";

			cpu_rev = "2.0";

			break;

		case 3:

		/* FALLTHROUGH */

		default:

			omap_revision = TI8148_REV_ES2_1;

			*cpu_rev = "2.1";

			cpu_rev = "2.1";

			break;

		}

		break;

	default:

		/* Unknown default to latest silicon rev as default */

		omap_revision = OMAP3630_REV_ES1_2;

		*cpu_rev = "1.2";

		cpu_rev = "1.2";

		pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");

	}

}



static void __init omap4_check_revision(void)

void __init omap4xxx_check_revision(void)

{

	u32 idcode;

	u16 hawkeye;
@@ -444,89 +497,6 @@ static void __init omap4_check_revision(void) 
		((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf));

}



#define OMAP3_SHOW_FEATURE(feat)		\

	if (omap3_has_ ##feat())		\

		printk(#feat" ");



static void __init omap3_cpuinfo(const char *cpu_rev)

{

	const char *cpu_name;



	/*

	 * OMAP3430 and OMAP3530 are assumed to be same.

	 *

	 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based

	 * on available features. Upon detection, update the CPU id

	 * and CPU class bits.

	 */

	if (cpu_is_omap3630()) {

		cpu_name = "OMAP3630";

	} else if (cpu_is_omap3517()) {

		/* AM35xx devices */

		cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";

	} else if (cpu_is_ti816x()) {

		cpu_name = "TI816X";

	} else if (cpu_is_am335x()) {

		cpu_name =  "AM335X";

	} else if (cpu_is_ti814x()) {

		cpu_name = "TI814X";

	} else if (omap3_has_iva() && omap3_has_sgx()) {

		/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */

		cpu_name = "OMAP3430/3530";

	} else if (omap3_has_iva()) {

		cpu_name = "OMAP3525";

	} else if (omap3_has_sgx()) {

		cpu_name = "OMAP3515";

	} else {

		cpu_name = "OMAP3503";

	}



	/* Print verbose information */

	pr_info("%s ES%s (", cpu_name, cpu_rev);



	OMAP3_SHOW_FEATURE(l2cache);

	OMAP3_SHOW_FEATURE(iva);

	OMAP3_SHOW_FEATURE(sgx);

	OMAP3_SHOW_FEATURE(neon);

	OMAP3_SHOW_FEATURE(isp);

	OMAP3_SHOW_FEATURE(192mhz_clk);



	printk(")\n");

}



/*

 * Try to detect the exact revision of the omap we're running on

 */

void __init omap2_check_revision(void)

{

	const char *cpu_rev;



	/*

	 * At this point we have an idea about the processor revision set

	 * earlier with omap2_set_globals_tap().

	 */

	if (cpu_is_omap24xx()) {

		omap24xx_check_revision();

	} else if (cpu_is_omap34xx()) {

		omap3_check_revision(&cpu_rev);



		/* TI81XX doesn't have feature register */

		if (!cpu_is_ti81xx())

			omap3_check_features();

		else

			ti81xx_check_features();



		omap3_cpuinfo(cpu_rev);

		return;

	} else if (cpu_is_omap44xx()) {

		omap4_check_revision();

		omap4_check_features();

		return;

	} else {

		pr_err("OMAP revision unknown, please fix!\n");

	}

}



/*

 * Set up things for map_io and processor detection later on. Gets called

 * pretty much first thing from board init. For multi-omap, this gets

arch/arm/mach-omap2/io.c

+8 −1
Original line number Diff line number Diff line
@@ -351,7 +351,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) 


static void __init omap_common_init_early(void)

{

	omap2_check_revision();

	omap_init_consistent_dma_size();

}
@@ -392,6 +391,7 @@ static void __init omap_hwmod_init_postsetup(void) 
void __init omap2420_init_early(void)

{

	omap2_set_globals_242x();

	omap2xxx_check_revision();

	omap_common_init_early();

	omap2xxx_voltagedomains_init();

	omap242x_powerdomains_init();
@@ -406,6 +406,7 @@ void __init omap2420_init_early(void) 
void __init omap2430_init_early(void)

{

	omap2_set_globals_243x();

	omap2xxx_check_revision();

	omap_common_init_early();

	omap2xxx_voltagedomains_init();

	omap243x_powerdomains_init();
@@ -424,6 +425,8 @@ void __init omap2430_init_early(void) 
void __init omap3_init_early(void)

{

	omap2_set_globals_3xxx();

	omap3xxx_check_revision();

	omap3xxx_check_features();

	omap_common_init_early();

	omap3xxx_voltagedomains_init();

	omap3xxx_powerdomains_init();
@@ -456,6 +459,8 @@ void __init am35xx_init_early(void) 
void __init ti81xx_init_early(void)

{

	omap2_set_globals_ti81xx();

	omap3xxx_check_revision();

	ti81xx_check_features();

	omap_common_init_early();

	omap3xxx_voltagedomains_init();

	omap3xxx_powerdomains_init();
@@ -470,6 +475,8 @@ void __init ti81xx_init_early(void) 
void __init omap4430_init_early(void)

{

	omap2_set_globals_443x();

	omap4xxx_check_revision();

	omap4xxx_check_features();

	omap_common_init_early();

	omap44xx_voltagedomains_init();

	omap44xx_powerdomains_init();

arch/arm/plat-omap/include/plat/cpu.h

+6 −1
Original line number Diff line number Diff line
@@ -451,7 +451,12 @@ IS_OMAP_TYPE(3517, 0x3517) 
#define OMAP447X_CLASS		0x44700044

#define OMAP4470_REV_ES1_0	(OMAP447X_CLASS | (0x10 << 8))



void omap2_check_revision(void);

void omap2xxx_check_revision(void);

void omap3xxx_check_revision(void);

void omap4xxx_check_revision(void);

void omap3xxx_check_features(void);

void ti81xx_check_features(void);

void omap4xxx_check_features(void);



/*

 * Runtime detection of OMAP3 features