Loading arch/arm/boot/dts/qcom/msmcobalt-smp2p.dtsi +69 −0 Original line number Diff line number Diff line Loading @@ -153,6 +153,75 @@ #interrupt-cells = <2>; }; /* ssr - inbound entry from mss */ smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <1>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - outbound entry to mss */ smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <1>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - inbound entry from lpass */ smp2pgpio_ssr_smp2p_2_in: qcom,smp2pgpio-ssr-smp2p-2-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <2>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - outbound entry to lpass */ smp2pgpio_ssr_smp2p_2_out: qcom,smp2pgpio-ssr-smp2p-2-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <2>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - inbound entry from ssc */ smp2pgpio_ssr_smp2p_3_in: qcom,smp2pgpio-ssr-smp2p-3-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <3>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - outbound entry to ssc */ smp2pgpio_ssr_smp2p_3_out: qcom,smp2pgpio-ssr-smp2p-3-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <3>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; qcom,smp2pgpio_test_smp2p_3_out { compatible = "qcom,smp2pgpio_test_smp2p_3_out"; gpios = <&smp2pgpio_smp2p_3_out 0 0>; Loading arch/arm/boot/dts/qcom/msmcobalt.dtsi +31 −0 Original line number Diff line number Diff line Loading @@ -763,6 +763,37 @@ clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset", "phy_phy_reset", "ref_clk_src", "ref_clk"; }; qcom,lpass@17300000 { compatible = "qcom,pil-tz-generic"; reg = <0x17300000 0x00100>; interrupts = <0 162 1>; vdd_cx-supply = <&pmcobalt_s1_level>; qcom,proxy-reg-names = "vdd_cx"; qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>; clocks = <&clock_gcc clk_cxo_pil_lpass_clk>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <1>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <423>; qcom,sysmon-id = <1>; qcom,ssctl-instance-id = <0x14>; qcom,firmware-name = "adsp"; memory-region = <&peripheral_mem>; /* GPIO inputs from lpass */ qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; /* GPIO output to lpass */ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; }; }; #include "msmcobalt-regulator.dtsi" Loading Loading
arch/arm/boot/dts/qcom/msmcobalt-smp2p.dtsi +69 −0 Original line number Diff line number Diff line Loading @@ -153,6 +153,75 @@ #interrupt-cells = <2>; }; /* ssr - inbound entry from mss */ smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <1>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - outbound entry to mss */ smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <1>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - inbound entry from lpass */ smp2pgpio_ssr_smp2p_2_in: qcom,smp2pgpio-ssr-smp2p-2-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <2>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - outbound entry to lpass */ smp2pgpio_ssr_smp2p_2_out: qcom,smp2pgpio-ssr-smp2p-2-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <2>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - inbound entry from ssc */ smp2pgpio_ssr_smp2p_3_in: qcom,smp2pgpio-ssr-smp2p-3-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <3>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; /* ssr - outbound entry to ssc */ smp2pgpio_ssr_smp2p_3_out: qcom,smp2pgpio-ssr-smp2p-3-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <3>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; qcom,smp2pgpio_test_smp2p_3_out { compatible = "qcom,smp2pgpio_test_smp2p_3_out"; gpios = <&smp2pgpio_smp2p_3_out 0 0>; Loading
arch/arm/boot/dts/qcom/msmcobalt.dtsi +31 −0 Original line number Diff line number Diff line Loading @@ -763,6 +763,37 @@ clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset", "phy_phy_reset", "ref_clk_src", "ref_clk"; }; qcom,lpass@17300000 { compatible = "qcom,pil-tz-generic"; reg = <0x17300000 0x00100>; interrupts = <0 162 1>; vdd_cx-supply = <&pmcobalt_s1_level>; qcom,proxy-reg-names = "vdd_cx"; qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>; clocks = <&clock_gcc clk_cxo_pil_lpass_clk>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <1>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <423>; qcom,sysmon-id = <1>; qcom,ssctl-instance-id = <0x14>; qcom,firmware-name = "adsp"; memory-region = <&peripheral_mem>; /* GPIO inputs from lpass */ qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; /* GPIO output to lpass */ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; }; }; #include "msmcobalt-regulator.dtsi" Loading