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Commit b1cffebf authored by Rob Herring's avatar Rob Herring
Browse files

ARM: GIC: remove direct use of gic_raise_softirq 



In preparation of moving gic code to drivers/irqchip, remove the direct
platform dependencies on gic_raise_softirq. Move the setup of
smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask
function to trigger wake-up IPIs.

Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: default avatarStephen Warren <swarren@nvidia.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: default avatarOlof Johansson <olof@lixom.net>
parent 428fef8a

arch/arm/common/gic.c

+24 −21
Original line number Diff line number Diff line
@@ -617,6 +617,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic) 
}

#endif



#ifdef CONFIG_SMP

void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)

{

	int cpu;

	unsigned long map = 0;



	/* Convert our logical CPU mask into a physical one. */

	for_each_cpu(cpu, mask)

		map |= 1 << cpu_logical_map(cpu);



	/*

	 * Ensure that stores to Normal memory are visible to the

	 * other CPUs before issuing the IPI.

	 */

	dsb();



	/* this always happens on GIC0 */

	writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);

}

#endif



static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,

				irq_hw_number_t hw)

{
@@ -743,6 +764,9 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, 
	if (WARN_ON(!gic->domain))

		return;



#ifdef CONFIG_SMP

	set_smp_cross_call(gic_raise_softirq);

#endif

	gic_chip.flags |= gic_arch_extn.flags;

	gic_dist_init(gic);

	gic_cpu_init(gic);
@@ -756,27 +780,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr) 
	gic_cpu_init(&gic_data[gic_nr]);

}



#ifdef CONFIG_SMP

void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)

{

	int cpu;

	unsigned long map = 0;



	/* Convert our logical CPU mask into a physical one. */

	for_each_cpu(cpu, mask)

		map |= gic_cpu_map[cpu];



	/*

	 * Ensure that stores to Normal memory are visible to the

	 * other CPUs before issuing the IPI.

	 */

	dsb();



	/* this always happens on GIC0 */

	writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);

}

#endif



#ifdef CONFIG_OF

static int gic_cnt __initdata = 0;

arch/arm/include/asm/hardware/gic.h

+0 −1
Original line number Diff line number Diff line
@@ -40,7 +40,6 @@ int gic_of_init(struct device_node *node, struct device_node *parent); 
void gic_secondary_init(unsigned int);

void gic_handle_irq(struct pt_regs *regs);

void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);

void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);



static inline void gic_init(unsigned int nr, int start,

			    void __iomem *dist , void __iomem *cpu)

arch/arm/kernel/smp.c

+2 −1
Original line number Diff line number Diff line
@@ -416,6 +416,7 @@ static void (*smp_cross_call)(const struct cpumask *, unsigned int); 


void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))

{

	if (!smp_cross_call)

		smp_cross_call = fn;

}

arch/arm/mach-exynos/platsmp.c

+1 −3
Original line number Diff line number Diff line
@@ -149,7 +149,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct 


		__raw_writel(virt_to_phys(exynos4_secondary_startup),

							cpu_boot_reg(phys_cpu));

		gic_raise_softirq(cpumask_of(cpu), 0);

		arch_send_wakeup_ipi_mask(cpumask_of(cpu));



		if (pen_release == -1)

			break;
@@ -190,8 +190,6 @@ static void __init exynos_smp_init_cpus(void) 


	for (i = 0; i < ncores; i++)

		set_cpu_possible(i, true);



	set_smp_cross_call(gic_raise_softirq);

}



static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)

arch/arm/mach-highbank/platsmp.c

+1 −3
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu) 
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)

{

	highbank_set_cpu_jump(cpu, secondary_startup);

	gic_raise_softirq(cpumask_of(cpu), 0);

	arch_send_wakeup_ipi_mask(cpumask_of(cpu));

	return 0;

}
@@ -56,8 +56,6 @@ static void __init highbank_smp_init_cpus(void) 


	for (i = 0; i < ncores; i++)

		set_cpu_possible(i, true);



	set_smp_cross_call(gic_raise_softirq);

}



static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)