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Commit b10fc1c3 authored by Andi Kleen's avatar Andi Kleen Committed by Ingo Molnar
Browse files

perf/x86/intel/uncore: Fix PCU filter setup for Sandy/Ivy/Haswell EP 



The PCU frequency band filters use 8 bit each in a register.
When setting up the value the shift value was not correctly
scaled, which resulted in all filters except for band 0 to
be zero. Fix the scaling.

This allows to correctly monitor multiple uncore frequency bands.

Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1409872109-31645-5-git-send-email-andi@firstfloor.org


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 7e96ae1a

arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c

+1 −1
Original line number Diff line number Diff line
@@ -841,7 +841,7 @@ static int snbep_pcu_hw_config(struct intel_uncore_box *box, struct perf_event * 
	if (ev_sel >= 0xb && ev_sel <= 0xe) {

		reg1->reg = SNBEP_PCU_MSR_PMON_BOX_FILTER;

		reg1->idx = ev_sel - 0xb;

		reg1->config = event->attr.config1 & (0xff << reg1->idx);

		reg1->config = event->attr.config1 & (0xff << (reg1->idx * 8));

	}

	return 0;

}