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Commit b0c3130d authored by Viresh Kumar's avatar Viresh Kumar Committed by Vinod Koul
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dw_dmac: Pass Channel Allocation Order from platform_data 



In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better
channel first. This patch introduces concept of channel allocation order in
dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel
allocation will follow, else channels will be allocated in descending order.

Signed-off-by: default avatarViresh Kumar <viresh.kumar@st.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent e518076e

drivers/dma/dw_dmac.c

+5 −1
Original line number Diff line number Diff line
@@ -1319,7 +1319,11 @@ static int __init dw_probe(struct platform_device *pdev) 
		dwc->chan.device = &dw->dma;

		dwc->chan.cookie = dwc->completed = 1;

		dwc->chan.chan_id = i;

		list_add_tail(&dwc->chan.device_node, &dw->dma.channels);

		if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)

			list_add_tail(&dwc->chan.device_node,

					&dw->dma.channels);

		else

			list_add(&dwc->chan.device_node, &dw->dma.channels);



		dwc->ch_regs = &__dw_regs(dw)->CHAN[i];

		spin_lock_init(&dwc->lock);

include/linux/dw_dmac.h

+3 −0
Original line number Diff line number Diff line
@@ -22,6 +22,9 @@ 
struct dw_dma_platform_data {

	unsigned int	nr_channels;

	bool		is_private;

#define CHAN_ALLOCATION_ASCENDING	0	/* zero to seven */

#define CHAN_ALLOCATION_DESCENDING	1	/* seven to zero */

	unsigned char	chan_allocation_order;

};



/**