Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b06f2ad5 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add hsuart support to msmthorium"

parents 211a4610 687c84fd

arch/arm/boot/dts/qcom/msmthorium-pinctrl.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -109,5 +109,31 @@ 
				};

			};

		};



		blsp2_uart1_active: blsp2_uart1_active {

			mux {

				pins = "gpio16", "gpio17", "gpio18", "gpio19";

				function = "blsp_uart5";

			};



			config {

				pins = "gpio16", "gpio17", "gpio18", "gpio19";

				drive-strength = <2>;

				bias-disable;

			};

		};



		blsp2_uart1_sleep: blsp2_uart1_sleep {

			mux {

				pins = "gpio16", "gpio17", "gpio18", "gpio19";

				function = "gpio";

			};



			config {

				pins = "gpio16", "gpio17", "gpio18", "gpio19";

				drive-strength = <2>;

				bias-disable;

			};

		};

	};

};

arch/arm/boot/dts/qcom/msmthorium.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -321,6 +321,42 @@ 
		#clock-cells = <1>;

	};



	blsp2_uart1: uart@7aef000 {

		compatible = "qcom,msm-hsuart-v14";

		reg = <0x7aef000 0x200>,

			<0x7ac4000 0x1f000>;

		reg-names = "core_mem", "bam_mem";

		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";

		#address-cells = <0>;

		interrupt-parent = <&blsp2_uart1>;

		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 306 0

				1 &intc 0 239 0

				2 &tlmm 17 0>;



		qcom,inject-rx-on-wakeup;

		qcom,rx-char-to-inject = <0xfd>;



		qcom,bam-tx-ep-pipe-index = <0>;

		qcom,bam-rx-ep-pipe-index = <1>;

		qcom,master-id = <84>;

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp2_uart1_apps_clk>,

				<&clock_gcc clk_gcc_blsp2_ahb_clk>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp2_uart1_sleep>;

		pinctrl-1 = <&blsp2_uart1_active>;

		qcom,msm-bus,name = "blsp2_uart1";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<84 512 0 0>,

				<84 512 500 800>;

		status = "disabled";

	};



	dcc: dcc@b3000 {

		compatible = "qcom,dcc";

		reg = <0xb3000 0x1000>,