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Commit b044aecd authored by Dhaval Patel's avatar Dhaval Patel
Browse files

mdss: mdp: avoid mdp done isr wait for split ctrl during reset 



A DSI fifo error can occur on one DSI controller and HW will
not generate the mdp done isr interrupt for both controllers
in case of pp split and dual dsi. Current dsi reset routine
only resets the busy checks for the controller where errors
are reported. It should reset both controllers because HW
is not going to the isr for other interrupt where fifo error
is not reported.

Change-Id: I4de587aec0b54d942637fbea3cbe13cb2bdac893
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent edf4d230

drivers/video/msm/mdss/mdss_dsi_host.c

+29 −16
Original line number Diff line number Diff line
@@ -2695,6 +2695,33 @@ need_lock: 
	return ret;

}



static void __dsi_fifo_error_handler(struct mdss_dsi_ctrl_pdata *ctrl,

	bool recovery_needed)

{

	struct mdss_dsi_ctrl_pdata *sctrl;

	bool use_pp_split = false;



	use_pp_split = ctrl->panel_data.panel_info.use_pingpong_split;



	mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle, MDSS_DSI_ALL_CLKS,

		  MDSS_DSI_CLK_ON);

	mdss_dsi_sw_reset(ctrl, true);

	if (recovery_needed)

		ctrl->recovery->fxn(ctrl->recovery->data,

			MDP_INTF_DSI_CMD_FIFO_UNDERFLOW);

	mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle, MDSS_DSI_ALL_CLKS,

		  MDSS_DSI_CLK_OFF);



	sctrl = mdss_dsi_get_other_ctrl(ctrl);

	if (sctrl && use_pp_split) {

		mdss_dsi_clk_ctrl(sctrl, sctrl->dsi_clk_handle,

			MDSS_DSI_ALL_CLKS, MDSS_DSI_CLK_ON);

		mdss_dsi_sw_reset(sctrl, true);

		mdss_dsi_clk_ctrl(sctrl, sctrl->dsi_clk_handle,

			MDSS_DSI_ALL_CLKS, MDSS_DSI_CLK_OFF);

	}

}



static void dsi_send_events(struct mdss_dsi_ctrl_pdata *ctrl,

					u32 events, u32 arg)

{
@@ -2757,15 +2784,7 @@ static int dsi_event_thread(void *data) 
			if (ctrl->recovery) {

				pr_debug("%s: Handling underflow event\n",

							__func__);

				mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle,

						  MDSS_DSI_ALL_CLKS,

						  MDSS_DSI_CLK_ON);

				mdss_dsi_sw_reset(ctrl, true);

				ctrl->recovery->fxn(ctrl->recovery->data,

					MDP_INTF_DSI_CMD_FIFO_UNDERFLOW);

				mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle,

						  MDSS_DSI_ALL_CLKS,

						  MDSS_DSI_CLK_OFF);

				__dsi_fifo_error_handler(ctrl, true);

			} else {

				pr_err("%s: ctrl recovery not defined\n",

						__func__);
@@ -2777,13 +2796,7 @@ static int dsi_event_thread(void *data) 
		}



		if (todo & DSI_EV_DSI_FIFO_EMPTY) {

			mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle,

					  MDSS_DSI_CORE_CLK,

					  MDSS_DSI_CLK_ON);

			mdss_dsi_sw_reset(ctrl, true);

			mdss_dsi_clk_ctrl(ctrl, ctrl->dsi_clk_handle,

					  MDSS_DSI_CORE_CLK,

					  MDSS_DSI_CLK_OFF);

			__dsi_fifo_error_handler(ctrl, false);

		}



		if (todo & DSI_EV_DLNx_FIFO_OVERFLOW) {